Auto merge of #151615 - matthiaskrgr:rollup-2WQ1USJ, r=matthiaskrgr

Rollup of 11 pull requests

Successful merges:

 - rust-lang/rust#149962 (Promote powerpc64-unknown-linux-musl to tier 2 with host tools)
 - rust-lang/rust#150138 (Add new Tier 3 targets for ARMv6)
 - rust-lang/rust#150905 (Fix(lib/win/net): Remove hostname support under Win7)
 - rust-lang/rust#151094 (remote-test-server: Fix compilation on UEFI targets)
 - rust-lang/rust#151346 (add `simd_splat` intrinsic)
 - rust-lang/rust#151353 (compiletest: Make `aux-crate` directive explicitly handle `--extern` modifiers)
 - rust-lang/rust#151538 (std: `sleep_until` on Motor and VEX)
 - rust-lang/rust#151098 (Add Korean translation to Rust By Example)
 - rust-lang/rust#151157 (Extend build-manifest local test guide)
 - rust-lang/rust#151403 (std: use 64-bit `clock_nanosleep` on GNU/Linux if available)
 - rust-lang/rust#151571 (Fix cstring-merging test for Hexagon target)

Author: bors

crates/core_arch/src/arm_shared/hints.rs

@@ -83,8 +83,11 @@ pub unsafe fn __sevl() {
 /// improve overall system performance.
 // Section 10.1 of ACLE says that the supported arches are: 8, 6K, 6-M
 // LLVM says "instruction requires: armv6k"
+// On ARMv6 in Thumb mode, T2 is required (see Arm DDI0406C Section A8.8.427)
 #[cfg(any(
-    target_feature = "v6",
+    all(target_feature = "v6k", not(target_feature = "thumb-mode")),
+    target_feature = "v6t2",
+    all(target_feature = "v6", target_feature = "mclass"),
     target_arch = "aarch64",
     target_arch = "arm64ec",
     doc