@@ -2835,7 +2835,7 @@ intrinsics:
28352835 - FnCall: [static_assert_uimm_bits!, [LANE, '{type[3]}']]
28362836 - FnCall: [simd_insert!, [src, "LANE as u32", "*ptr"]]
28372837
2838- - name: "vld1{type[2]}_{ neon_type[1]}"
2838+ - name: "vld1{neon_type[1].dup_nox }"
28392839 doc: "Load one single-element structure and replicate to all lanes of one register"
28402840 arguments: ["ptr: {type[0]}"]
28412841 return_type: "{neon_type[1]}"
@@ -2849,11 +2849,11 @@ intrinsics:
28492849 safety:
28502850 unsafe: [neon]
28512851 types:
2852- - ["*const f16", float16x4_t, '_dup ', 'f16x4', "[0, 0, 0, 0]" ]
2853- - ["*const f16", float16x8_t, 'q_dup ', 'f16x8', "[0, 0, 0, 0, 0, 0, 0, 0]" ]
2852+ - ["*const f16", float16x4_t, '_lane ', 'f16x4']
2853+ - ["*const f16", float16x8_t, 'q_laneq ', 'f16x8']
28542854 compose:
2855- - Let: [x, "{neon_type[1]}", " vld1{neon_type[1].lane_nox}::<0>( ptr, transmute( {type[3]}::splat(0.0)))" ]
2856- - FnCall: [simd_shuffle! , [x, x, "{type[4]}" ]]
2855+ - Let: [x, {FnCall: [" vld1{neon_type[1].lane_nox}", [ ptr, {FnCall: [ transmute, [" {type[3]}::splat(0.0)"]]}], [0]]} ]
2856+ - FnCall: ['vdup{type[2]}_{neon_type[1]}' , [x], [0 ]]
28572857
28582858
28592859 - name: "vld2{neon_type[1].nox}"
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