@@ -160,15 +160,23 @@ mod tests {
160160 let y = _mm_setr_epi64x ( v, 0 ) ;
161161 let e = _mm_setr_epi64x ( 0b0110_i64 , 0 ) ;
162162 let r = _mm_extract_si64 ( x, y) ;
163- assert_eq_m128i ( r, e) ;
163+
164+ // The upper quadword of the destination register is undefined.
165+ let r = _mm_cvtsi128_si64 ( r) ;
166+ let e = _mm_cvtsi128_si64 ( e) ;
167+ assert_eq ! ( r, e) ;
164168 }
165169
166170 #[ simd_test( enable = "sse4a" ) ]
167171 fn test_mm_extracti_si64 ( ) {
168172 let a = _mm_setr_epi64x ( 0x0123456789abcdef , 0 ) ;
169173 let r = _mm_extracti_si64 :: < 8 , 8 > ( a) ;
170174 let e = _mm_setr_epi64x ( 0xcd , 0 ) ;
171- assert_eq_m128i ( r, e) ;
175+
176+ // The upper quadword of the destination register is undefined.
177+ let r = _mm_cvtsi128_si64 ( r) ;
178+ let e = _mm_cvtsi128_si64 ( e) ;
179+ assert_eq ! ( r, e) ;
172180 }
173181
174182 #[ simd_test( enable = "sse4a" ) ]
@@ -185,7 +193,11 @@ mod tests {
185193 // ^idx: 2^3 = 8 ^length = 2^2 = 4
186194 let y = _mm_setr_epi64x ( i, v) ;
187195 let r = _mm_insert_si64 ( x, y) ;
188- assert_eq_m128i ( r, expected) ;
196+
197+ // The upper quadword of the destination register is undefined.
198+ let r = _mm_cvtsi128_si64 ( r) ;
199+ let expected = _mm_cvtsi128_si64 ( expected) ;
200+ assert_eq ! ( r, expected) ;
189201 }
190202
191203 #[ simd_test( enable = "sse4a" ) ]
@@ -194,7 +206,11 @@ mod tests {
194206 let b = _mm_setr_epi64x ( 0x0011223344556677 , 0 ) ;
195207 let r = _mm_inserti_si64 :: < 8 , 8 > ( a, b) ;
196208 let e = _mm_setr_epi64x ( 0x0123456789ab77ef , 0 ) ;
197- assert_eq_m128i ( r, e) ;
209+
210+ // The upper quadword of the destination register is undefined.
211+ let r = _mm_cvtsi128_si64 ( r) ;
212+ let e = _mm_cvtsi128_si64 ( e) ;
213+ assert_eq ! ( r, e) ;
198214 }
199215
200216 #[ repr( align( 16 ) ) ]
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