Skip to content

Commit 6a716c4

Browse files
folkertdevfolkertdev
committed
aarch64: use simd_reduce_{min, max} on integers
1 parent 81ecf82 commit 6a716c4

2 files changed

Lines changed: 28 additions & 212 deletions

File tree

‎crates/core_arch/src/aarch64/neon/generated.rs‎

Lines changed: 24 additions & 192 deletions
Original file line numberDiff line numberDiff line change
@@ -13745,14 +13745,7 @@ pub fn vmaxvq_f64(a: float64x2_t) -> f64 {
1374513745
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1374613746
#[cfg_attr(test, assert_instr(smaxv))]
1374713747
pub fn vmaxv_s8(a: int8x8_t) -> i8 {
13748-
unsafe extern "unadjusted" {
13749-
#[cfg_attr(
13750-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13751-
link_name = "llvm.aarch64.neon.smaxv.i8.v8i8"
13752-
)]
13753-
fn _vmaxv_s8(a: int8x8_t) -> i8;
13754-
}
13755-
unsafe { _vmaxv_s8(a) }
13748+
unsafe { simd_reduce_max(a) }
1375613749
}
1375713750
#[doc = "Horizontal vector max."]
1375813751
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s8)"]
@@ -13761,14 +13754,7 @@ pub fn vmaxv_s8(a: int8x8_t) -> i8 {
1376113754
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1376213755
#[cfg_attr(test, assert_instr(smaxv))]
1376313756
pub fn vmaxvq_s8(a: int8x16_t) -> i8 {
13764-
unsafe extern "unadjusted" {
13765-
#[cfg_attr(
13766-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13767-
link_name = "llvm.aarch64.neon.smaxv.i8.v16i8"
13768-
)]
13769-
fn _vmaxvq_s8(a: int8x16_t) -> i8;
13770-
}
13771-
unsafe { _vmaxvq_s8(a) }
13757+
unsafe { simd_reduce_max(a) }
1377213758
}
1377313759
#[doc = "Horizontal vector max."]
1377413760
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s16)"]
@@ -13777,14 +13763,7 @@ pub fn vmaxvq_s8(a: int8x16_t) -> i8 {
1377713763
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1377813764
#[cfg_attr(test, assert_instr(smaxv))]
1377913765
pub fn vmaxv_s16(a: int16x4_t) -> i16 {
13780-
unsafe extern "unadjusted" {
13781-
#[cfg_attr(
13782-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13783-
link_name = "llvm.aarch64.neon.smaxv.i16.v4i16"
13784-
)]
13785-
fn _vmaxv_s16(a: int16x4_t) -> i16;
13786-
}
13787-
unsafe { _vmaxv_s16(a) }
13766+
unsafe { simd_reduce_max(a) }
1378813767
}
1378913768
#[doc = "Horizontal vector max."]
1379013769
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s16)"]
@@ -13793,14 +13772,7 @@ pub fn vmaxv_s16(a: int16x4_t) -> i16 {
1379313772
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1379413773
#[cfg_attr(test, assert_instr(smaxv))]
1379513774
pub fn vmaxvq_s16(a: int16x8_t) -> i16 {
13796-
unsafe extern "unadjusted" {
13797-
#[cfg_attr(
13798-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13799-
link_name = "llvm.aarch64.neon.smaxv.i16.v8i16"
13800-
)]
13801-
fn _vmaxvq_s16(a: int16x8_t) -> i16;
13802-
}
13803-
unsafe { _vmaxvq_s16(a) }
13775+
unsafe { simd_reduce_max(a) }
1380413776
}
1380513777
#[doc = "Horizontal vector max."]
1380613778
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s32)"]
@@ -13809,14 +13781,7 @@ pub fn vmaxvq_s16(a: int16x8_t) -> i16 {
1380913781
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1381013782
#[cfg_attr(test, assert_instr(smaxp))]
1381113783
pub fn vmaxv_s32(a: int32x2_t) -> i32 {
13812-
unsafe extern "unadjusted" {
13813-
#[cfg_attr(
13814-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13815-
link_name = "llvm.aarch64.neon.smaxv.i32.v2i32"
13816-
)]
13817-
fn _vmaxv_s32(a: int32x2_t) -> i32;
13818-
}
13819-
unsafe { _vmaxv_s32(a) }
13784+
unsafe { simd_reduce_max(a) }
1382013785
}
1382113786
#[doc = "Horizontal vector max."]
1382213787
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s32)"]
@@ -13825,14 +13790,7 @@ pub fn vmaxv_s32(a: int32x2_t) -> i32 {
1382513790
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1382613791
#[cfg_attr(test, assert_instr(smaxv))]
1382713792
pub fn vmaxvq_s32(a: int32x4_t) -> i32 {
13828-
unsafe extern "unadjusted" {
13829-
#[cfg_attr(
13830-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13831-
link_name = "llvm.aarch64.neon.smaxv.i32.v4i32"
13832-
)]
13833-
fn _vmaxvq_s32(a: int32x4_t) -> i32;
13834-
}
13835-
unsafe { _vmaxvq_s32(a) }
13793+
unsafe { simd_reduce_max(a) }
1383613794
}
1383713795
#[doc = "Horizontal vector max."]
1383813796
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u8)"]
@@ -13841,14 +13799,7 @@ pub fn vmaxvq_s32(a: int32x4_t) -> i32 {
1384113799
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1384213800
#[cfg_attr(test, assert_instr(umaxv))]
1384313801
pub fn vmaxv_u8(a: uint8x8_t) -> u8 {
13844-
unsafe extern "unadjusted" {
13845-
#[cfg_attr(
13846-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13847-
link_name = "llvm.aarch64.neon.umaxv.i8.v8i8"
13848-
)]
13849-
fn _vmaxv_u8(a: uint8x8_t) -> u8;
13850-
}
13851-
unsafe { _vmaxv_u8(a) }
13802+
unsafe { simd_reduce_max(a) }
1385213803
}
1385313804
#[doc = "Horizontal vector max."]
1385413805
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u8)"]
@@ -13857,14 +13808,7 @@ pub fn vmaxv_u8(a: uint8x8_t) -> u8 {
1385713808
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1385813809
#[cfg_attr(test, assert_instr(umaxv))]
1385913810
pub fn vmaxvq_u8(a: uint8x16_t) -> u8 {
13860-
unsafe extern "unadjusted" {
13861-
#[cfg_attr(
13862-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13863-
link_name = "llvm.aarch64.neon.umaxv.i8.v16i8"
13864-
)]
13865-
fn _vmaxvq_u8(a: uint8x16_t) -> u8;
13866-
}
13867-
unsafe { _vmaxvq_u8(a) }
13811+
unsafe { simd_reduce_max(a) }
1386813812
}
1386913813
#[doc = "Horizontal vector max."]
1387013814
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u16)"]
@@ -13873,14 +13817,7 @@ pub fn vmaxvq_u8(a: uint8x16_t) -> u8 {
1387313817
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1387413818
#[cfg_attr(test, assert_instr(umaxv))]
1387513819
pub fn vmaxv_u16(a: uint16x4_t) -> u16 {
13876-
unsafe extern "unadjusted" {
13877-
#[cfg_attr(
13878-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13879-
link_name = "llvm.aarch64.neon.umaxv.i16.v4i16"
13880-
)]
13881-
fn _vmaxv_u16(a: uint16x4_t) -> u16;
13882-
}
13883-
unsafe { _vmaxv_u16(a) }
13820+
unsafe { simd_reduce_max(a) }
1388413821
}
1388513822
#[doc = "Horizontal vector max."]
1388613823
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u16)"]
@@ -13889,14 +13826,7 @@ pub fn vmaxv_u16(a: uint16x4_t) -> u16 {
1388913826
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1389013827
#[cfg_attr(test, assert_instr(umaxv))]
1389113828
pub fn vmaxvq_u16(a: uint16x8_t) -> u16 {
13892-
unsafe extern "unadjusted" {
13893-
#[cfg_attr(
13894-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13895-
link_name = "llvm.aarch64.neon.umaxv.i16.v8i16"
13896-
)]
13897-
fn _vmaxvq_u16(a: uint16x8_t) -> u16;
13898-
}
13899-
unsafe { _vmaxvq_u16(a) }
13829+
unsafe { simd_reduce_max(a) }
1390013830
}
1390113831
#[doc = "Horizontal vector max."]
1390213832
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u32)"]
@@ -13905,14 +13835,7 @@ pub fn vmaxvq_u16(a: uint16x8_t) -> u16 {
1390513835
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1390613836
#[cfg_attr(test, assert_instr(umaxp))]
1390713837
pub fn vmaxv_u32(a: uint32x2_t) -> u32 {
13908-
unsafe extern "unadjusted" {
13909-
#[cfg_attr(
13910-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13911-
link_name = "llvm.aarch64.neon.umaxv.i32.v2i32"
13912-
)]
13913-
fn _vmaxv_u32(a: uint32x2_t) -> u32;
13914-
}
13915-
unsafe { _vmaxv_u32(a) }
13838+
unsafe { simd_reduce_max(a) }
1391613839
}
1391713840
#[doc = "Horizontal vector max."]
1391813841
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u32)"]
@@ -13921,14 +13844,7 @@ pub fn vmaxv_u32(a: uint32x2_t) -> u32 {
1392113844
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1392213845
#[cfg_attr(test, assert_instr(umaxv))]
1392313846
pub fn vmaxvq_u32(a: uint32x4_t) -> u32 {
13924-
unsafe extern "unadjusted" {
13925-
#[cfg_attr(
13926-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13927-
link_name = "llvm.aarch64.neon.umaxv.i32.v4i32"
13928-
)]
13929-
fn _vmaxvq_u32(a: uint32x4_t) -> u32;
13930-
}
13931-
unsafe { _vmaxvq_u32(a) }
13847+
unsafe { simd_reduce_max(a) }
1393213848
}
1393313849
#[doc = "Minimum (vector)"]
1393413850
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_f64)"]
@@ -14199,14 +14115,7 @@ pub fn vminvq_f64(a: float64x2_t) -> f64 {
1419914115
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1420014116
#[cfg_attr(test, assert_instr(sminv))]
1420114117
pub fn vminv_s8(a: int8x8_t) -> i8 {
14202-
unsafe extern "unadjusted" {
14203-
#[cfg_attr(
14204-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14205-
link_name = "llvm.aarch64.neon.sminv.i8.v8i8"
14206-
)]
14207-
fn _vminv_s8(a: int8x8_t) -> i8;
14208-
}
14209-
unsafe { _vminv_s8(a) }
14118+
unsafe { simd_reduce_min(a) }
1421014119
}
1421114120
#[doc = "Horizontal vector min."]
1421214121
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s8)"]
@@ -14215,14 +14124,7 @@ pub fn vminv_s8(a: int8x8_t) -> i8 {
1421514124
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1421614125
#[cfg_attr(test, assert_instr(sminv))]
1421714126
pub fn vminvq_s8(a: int8x16_t) -> i8 {
14218-
unsafe extern "unadjusted" {
14219-
#[cfg_attr(
14220-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14221-
link_name = "llvm.aarch64.neon.sminv.i8.v16i8"
14222-
)]
14223-
fn _vminvq_s8(a: int8x16_t) -> i8;
14224-
}
14225-
unsafe { _vminvq_s8(a) }
14127+
unsafe { simd_reduce_min(a) }
1422614128
}
1422714129
#[doc = "Horizontal vector min."]
1422814130
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s16)"]
@@ -14231,14 +14133,7 @@ pub fn vminvq_s8(a: int8x16_t) -> i8 {
1423114133
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1423214134
#[cfg_attr(test, assert_instr(sminv))]
1423314135
pub fn vminv_s16(a: int16x4_t) -> i16 {
14234-
unsafe extern "unadjusted" {
14235-
#[cfg_attr(
14236-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14237-
link_name = "llvm.aarch64.neon.sminv.i16.v4i16"
14238-
)]
14239-
fn _vminv_s16(a: int16x4_t) -> i16;
14240-
}
14241-
unsafe { _vminv_s16(a) }
14136+
unsafe { simd_reduce_min(a) }
1424214137
}
1424314138
#[doc = "Horizontal vector min."]
1424414139
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s16)"]
@@ -14247,14 +14142,7 @@ pub fn vminv_s16(a: int16x4_t) -> i16 {
1424714142
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1424814143
#[cfg_attr(test, assert_instr(sminv))]
1424914144
pub fn vminvq_s16(a: int16x8_t) -> i16 {
14250-
unsafe extern "unadjusted" {
14251-
#[cfg_attr(
14252-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14253-
link_name = "llvm.aarch64.neon.sminv.i16.v8i16"
14254-
)]
14255-
fn _vminvq_s16(a: int16x8_t) -> i16;
14256-
}
14257-
unsafe { _vminvq_s16(a) }
14145+
unsafe { simd_reduce_min(a) }
1425814146
}
1425914147
#[doc = "Horizontal vector min."]
1426014148
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s32)"]
@@ -14263,14 +14151,7 @@ pub fn vminvq_s16(a: int16x8_t) -> i16 {
1426314151
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1426414152
#[cfg_attr(test, assert_instr(sminp))]
1426514153
pub fn vminv_s32(a: int32x2_t) -> i32 {
14266-
unsafe extern "unadjusted" {
14267-
#[cfg_attr(
14268-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14269-
link_name = "llvm.aarch64.neon.sminv.i32.v2i32"
14270-
)]
14271-
fn _vminv_s32(a: int32x2_t) -> i32;
14272-
}
14273-
unsafe { _vminv_s32(a) }
14154+
unsafe { simd_reduce_min(a) }
1427414155
}
1427514156
#[doc = "Horizontal vector min."]
1427614157
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s32)"]
@@ -14279,14 +14160,7 @@ pub fn vminv_s32(a: int32x2_t) -> i32 {
1427914160
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1428014161
#[cfg_attr(test, assert_instr(sminv))]
1428114162
pub fn vminvq_s32(a: int32x4_t) -> i32 {
14282-
unsafe extern "unadjusted" {
14283-
#[cfg_attr(
14284-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14285-
link_name = "llvm.aarch64.neon.sminv.i32.v4i32"
14286-
)]
14287-
fn _vminvq_s32(a: int32x4_t) -> i32;
14288-
}
14289-
unsafe { _vminvq_s32(a) }
14163+
unsafe { simd_reduce_min(a) }
1429014164
}
1429114165
#[doc = "Horizontal vector min."]
1429214166
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u8)"]
@@ -14295,14 +14169,7 @@ pub fn vminvq_s32(a: int32x4_t) -> i32 {
1429514169
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1429614170
#[cfg_attr(test, assert_instr(uminv))]
1429714171
pub fn vminv_u8(a: uint8x8_t) -> u8 {
14298-
unsafe extern "unadjusted" {
14299-
#[cfg_attr(
14300-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14301-
link_name = "llvm.aarch64.neon.uminv.i8.v8i8"
14302-
)]
14303-
fn _vminv_u8(a: uint8x8_t) -> u8;
14304-
}
14305-
unsafe { _vminv_u8(a) }
14172+
unsafe { simd_reduce_min(a) }
1430614173
}
1430714174
#[doc = "Horizontal vector min."]
1430814175
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u8)"]
@@ -14311,14 +14178,7 @@ pub fn vminv_u8(a: uint8x8_t) -> u8 {
1431114178
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1431214179
#[cfg_attr(test, assert_instr(uminv))]
1431314180
pub fn vminvq_u8(a: uint8x16_t) -> u8 {
14314-
unsafe extern "unadjusted" {
14315-
#[cfg_attr(
14316-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14317-
link_name = "llvm.aarch64.neon.uminv.i8.v16i8"
14318-
)]
14319-
fn _vminvq_u8(a: uint8x16_t) -> u8;
14320-
}
14321-
unsafe { _vminvq_u8(a) }
14181+
unsafe { simd_reduce_min(a) }
1432214182
}
1432314183
#[doc = "Horizontal vector min."]
1432414184
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u16)"]
@@ -14327,14 +14187,7 @@ pub fn vminvq_u8(a: uint8x16_t) -> u8 {
1432714187
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1432814188
#[cfg_attr(test, assert_instr(uminv))]
1432914189
pub fn vminv_u16(a: uint16x4_t) -> u16 {
14330-
unsafe extern "unadjusted" {
14331-
#[cfg_attr(
14332-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14333-
link_name = "llvm.aarch64.neon.uminv.i16.v4i16"
14334-
)]
14335-
fn _vminv_u16(a: uint16x4_t) -> u16;
14336-
}
14337-
unsafe { _vminv_u16(a) }
14190+
unsafe { simd_reduce_min(a) }
1433814191
}
1433914192
#[doc = "Horizontal vector min."]
1434014193
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u16)"]
@@ -14343,14 +14196,7 @@ pub fn vminv_u16(a: uint16x4_t) -> u16 {
1434314196
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1434414197
#[cfg_attr(test, assert_instr(uminv))]
1434514198
pub fn vminvq_u16(a: uint16x8_t) -> u16 {
14346-
unsafe extern "unadjusted" {
14347-
#[cfg_attr(
14348-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14349-
link_name = "llvm.aarch64.neon.uminv.i16.v8i16"
14350-
)]
14351-
fn _vminvq_u16(a: uint16x8_t) -> u16;
14352-
}
14353-
unsafe { _vminvq_u16(a) }
14199+
unsafe { simd_reduce_min(a) }
1435414200
}
1435514201
#[doc = "Horizontal vector min."]
1435614202
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u32)"]
@@ -14359,14 +14205,7 @@ pub fn vminvq_u16(a: uint16x8_t) -> u16 {
1435914205
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1436014206
#[cfg_attr(test, assert_instr(uminp))]
1436114207
pub fn vminv_u32(a: uint32x2_t) -> u32 {
14362-
unsafe extern "unadjusted" {
14363-
#[cfg_attr(
14364-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14365-
link_name = "llvm.aarch64.neon.uminv.i32.v2i32"
14366-
)]
14367-
fn _vminv_u32(a: uint32x2_t) -> u32;
14368-
}
14369-
unsafe { _vminv_u32(a) }
14208+
unsafe { simd_reduce_min(a) }
1437014209
}
1437114210
#[doc = "Horizontal vector min."]
1437214211
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u32)"]
@@ -14375,14 +14214,7 @@ pub fn vminv_u32(a: uint32x2_t) -> u32 {
1437514214
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1437614215
#[cfg_attr(test, assert_instr(uminv))]
1437714216
pub fn vminvq_u32(a: uint32x4_t) -> u32 {
14378-
unsafe extern "unadjusted" {
14379-
#[cfg_attr(
14380-
any(target_arch = "aarch64", target_arch = "arm64ec"),
14381-
link_name = "llvm.aarch64.neon.uminv.i32.v4i32"
14382-
)]
14383-
fn _vminvq_u32(a: uint32x4_t) -> u32;
14384-
}
14385-
unsafe { _vminvq_u32(a) }
14217+
unsafe { simd_reduce_min(a) }
1438614218
}
1438714219
#[doc = "Floating-point multiply-add to accumulator"]
1438814220
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmla_f64)"]

0 commit comments

Comments
 (0)