Skip to content

Commit aa5f00a

Browse files
folkertdevfolkertdev
authored
Merge pull request #2093 from heiher/vbit-clr-rev-set
loongarch: Use `intrinsics::simd` for vbit{clr,rev,set}
2 parents 5569035 + 1892beb commit aa5f00a

8 files changed

Lines changed: 90 additions & 216 deletions

File tree

‎crates/core_arch/src/loongarch64/lasx/generated.rs‎

Lines changed: 0 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -43,14 +43,6 @@ unsafe extern "unadjusted" {
4343
fn __lasx_xvsrlri_w(a: __v8i32, b: u32) -> __v8i32;
4444
#[link_name = "llvm.loongarch.lasx.xvsrlri.d"]
4545
fn __lasx_xvsrlri_d(a: __v4i64, b: u32) -> __v4i64;
46-
#[link_name = "llvm.loongarch.lasx.xvbitclr.b"]
47-
fn __lasx_xvbitclr_b(a: __v32u8, b: __v32u8) -> __v32u8;
48-
#[link_name = "llvm.loongarch.lasx.xvbitclr.h"]
49-
fn __lasx_xvbitclr_h(a: __v16u16, b: __v16u16) -> __v16u16;
50-
#[link_name = "llvm.loongarch.lasx.xvbitclr.w"]
51-
fn __lasx_xvbitclr_w(a: __v8u32, b: __v8u32) -> __v8u32;
52-
#[link_name = "llvm.loongarch.lasx.xvbitclr.d"]
53-
fn __lasx_xvbitclr_d(a: __v4u64, b: __v4u64) -> __v4u64;
5446
#[link_name = "llvm.loongarch.lasx.xvbitclri.b"]
5547
fn __lasx_xvbitclri_b(a: __v32u8, b: u32) -> __v32u8;
5648
#[link_name = "llvm.loongarch.lasx.xvbitclri.h"]
@@ -59,14 +51,6 @@ unsafe extern "unadjusted" {
5951
fn __lasx_xvbitclri_w(a: __v8u32, b: u32) -> __v8u32;
6052
#[link_name = "llvm.loongarch.lasx.xvbitclri.d"]
6153
fn __lasx_xvbitclri_d(a: __v4u64, b: u32) -> __v4u64;
62-
#[link_name = "llvm.loongarch.lasx.xvbitset.b"]
63-
fn __lasx_xvbitset_b(a: __v32u8, b: __v32u8) -> __v32u8;
64-
#[link_name = "llvm.loongarch.lasx.xvbitset.h"]
65-
fn __lasx_xvbitset_h(a: __v16u16, b: __v16u16) -> __v16u16;
66-
#[link_name = "llvm.loongarch.lasx.xvbitset.w"]
67-
fn __lasx_xvbitset_w(a: __v8u32, b: __v8u32) -> __v8u32;
68-
#[link_name = "llvm.loongarch.lasx.xvbitset.d"]
69-
fn __lasx_xvbitset_d(a: __v4u64, b: __v4u64) -> __v4u64;
7054
#[link_name = "llvm.loongarch.lasx.xvbitseti.b"]
7155
fn __lasx_xvbitseti_b(a: __v32u8, b: u32) -> __v32u8;
7256
#[link_name = "llvm.loongarch.lasx.xvbitseti.h"]
@@ -75,14 +59,6 @@ unsafe extern "unadjusted" {
7559
fn __lasx_xvbitseti_w(a: __v8u32, b: u32) -> __v8u32;
7660
#[link_name = "llvm.loongarch.lasx.xvbitseti.d"]
7761
fn __lasx_xvbitseti_d(a: __v4u64, b: u32) -> __v4u64;
78-
#[link_name = "llvm.loongarch.lasx.xvbitrev.b"]
79-
fn __lasx_xvbitrev_b(a: __v32u8, b: __v32u8) -> __v32u8;
80-
#[link_name = "llvm.loongarch.lasx.xvbitrev.h"]
81-
fn __lasx_xvbitrev_h(a: __v16u16, b: __v16u16) -> __v16u16;
82-
#[link_name = "llvm.loongarch.lasx.xvbitrev.w"]
83-
fn __lasx_xvbitrev_w(a: __v8u32, b: __v8u32) -> __v8u32;
84-
#[link_name = "llvm.loongarch.lasx.xvbitrev.d"]
85-
fn __lasx_xvbitrev_d(a: __v4u64, b: __v4u64) -> __v4u64;
8662
#[link_name = "llvm.loongarch.lasx.xvbitrevi.b"]
8763
fn __lasx_xvbitrevi_b(a: __v32u8, b: u32) -> __v32u8;
8864
#[link_name = "llvm.loongarch.lasx.xvbitrevi.h"]
@@ -1285,34 +1261,6 @@ pub fn lasx_xvsrlri_d<const IMM6: u32>(a: m256i) -> m256i {
12851261
unsafe { transmute(__lasx_xvsrlri_d(transmute(a), IMM6)) }
12861262
}
12871263

1288-
#[inline]
1289-
#[target_feature(enable = "lasx")]
1290-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1291-
pub fn lasx_xvbitclr_b(a: m256i, b: m256i) -> m256i {
1292-
unsafe { transmute(__lasx_xvbitclr_b(transmute(a), transmute(b))) }
1293-
}
1294-
1295-
#[inline]
1296-
#[target_feature(enable = "lasx")]
1297-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1298-
pub fn lasx_xvbitclr_h(a: m256i, b: m256i) -> m256i {
1299-
unsafe { transmute(__lasx_xvbitclr_h(transmute(a), transmute(b))) }
1300-
}
1301-
1302-
#[inline]
1303-
#[target_feature(enable = "lasx")]
1304-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1305-
pub fn lasx_xvbitclr_w(a: m256i, b: m256i) -> m256i {
1306-
unsafe { transmute(__lasx_xvbitclr_w(transmute(a), transmute(b))) }
1307-
}
1308-
1309-
#[inline]
1310-
#[target_feature(enable = "lasx")]
1311-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1312-
pub fn lasx_xvbitclr_d(a: m256i, b: m256i) -> m256i {
1313-
unsafe { transmute(__lasx_xvbitclr_d(transmute(a), transmute(b))) }
1314-
}
1315-
13161264
#[inline]
13171265
#[target_feature(enable = "lasx")]
13181266
#[rustc_legacy_const_generics(1)]
@@ -1349,34 +1297,6 @@ pub fn lasx_xvbitclri_d<const IMM6: u32>(a: m256i) -> m256i {
13491297
unsafe { transmute(__lasx_xvbitclri_d(transmute(a), IMM6)) }
13501298
}
13511299

1352-
#[inline]
1353-
#[target_feature(enable = "lasx")]
1354-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1355-
pub fn lasx_xvbitset_b(a: m256i, b: m256i) -> m256i {
1356-
unsafe { transmute(__lasx_xvbitset_b(transmute(a), transmute(b))) }
1357-
}
1358-
1359-
#[inline]
1360-
#[target_feature(enable = "lasx")]
1361-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1362-
pub fn lasx_xvbitset_h(a: m256i, b: m256i) -> m256i {
1363-
unsafe { transmute(__lasx_xvbitset_h(transmute(a), transmute(b))) }
1364-
}
1365-
1366-
#[inline]
1367-
#[target_feature(enable = "lasx")]
1368-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1369-
pub fn lasx_xvbitset_w(a: m256i, b: m256i) -> m256i {
1370-
unsafe { transmute(__lasx_xvbitset_w(transmute(a), transmute(b))) }
1371-
}
1372-
1373-
#[inline]
1374-
#[target_feature(enable = "lasx")]
1375-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1376-
pub fn lasx_xvbitset_d(a: m256i, b: m256i) -> m256i {
1377-
unsafe { transmute(__lasx_xvbitset_d(transmute(a), transmute(b))) }
1378-
}
1379-
13801300
#[inline]
13811301
#[target_feature(enable = "lasx")]
13821302
#[rustc_legacy_const_generics(1)]
@@ -1413,34 +1333,6 @@ pub fn lasx_xvbitseti_d<const IMM6: u32>(a: m256i) -> m256i {
14131333
unsafe { transmute(__lasx_xvbitseti_d(transmute(a), IMM6)) }
14141334
}
14151335

1416-
#[inline]
1417-
#[target_feature(enable = "lasx")]
1418-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1419-
pub fn lasx_xvbitrev_b(a: m256i, b: m256i) -> m256i {
1420-
unsafe { transmute(__lasx_xvbitrev_b(transmute(a), transmute(b))) }
1421-
}
1422-
1423-
#[inline]
1424-
#[target_feature(enable = "lasx")]
1425-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1426-
pub fn lasx_xvbitrev_h(a: m256i, b: m256i) -> m256i {
1427-
unsafe { transmute(__lasx_xvbitrev_h(transmute(a), transmute(b))) }
1428-
}
1429-
1430-
#[inline]
1431-
#[target_feature(enable = "lasx")]
1432-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1433-
pub fn lasx_xvbitrev_w(a: m256i, b: m256i) -> m256i {
1434-
unsafe { transmute(__lasx_xvbitrev_w(transmute(a), transmute(b))) }
1435-
}
1436-
1437-
#[inline]
1438-
#[target_feature(enable = "lasx")]
1439-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1440-
pub fn lasx_xvbitrev_d(a: m256i, b: m256i) -> m256i {
1441-
unsafe { transmute(__lasx_xvbitrev_d(transmute(a), transmute(b))) }
1442-
}
1443-
14441336
#[inline]
14451337
#[target_feature(enable = "lasx")]
14461338
#[rustc_legacy_const_generics(1)]

‎crates/core_arch/src/loongarch64/lasx/portable.rs‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,18 @@ impl_vvv!("lasx", lasx_xvsrl_b, ls::simd_shr, m256i, u8x32);
120120
impl_vvv!("lasx", lasx_xvsrl_h, ls::simd_shr, m256i, u16x16);
121121
impl_vvv!("lasx", lasx_xvsrl_w, ls::simd_shr, m256i, u32x8);
122122
impl_vvv!("lasx", lasx_xvsrl_d, ls::simd_shr, m256i, u64x4);
123+
impl_vvv!("lasx", lasx_xvbitclr_b, ls::simd_bitclr, m256i, u8x32);
124+
impl_vvv!("lasx", lasx_xvbitclr_h, ls::simd_bitclr, m256i, u16x16);
125+
impl_vvv!("lasx", lasx_xvbitclr_w, ls::simd_bitclr, m256i, u32x8);
126+
impl_vvv!("lasx", lasx_xvbitclr_d, ls::simd_bitclr, m256i, u64x4);
127+
impl_vvv!("lasx", lasx_xvbitset_b, ls::simd_bitset, m256i, u8x32);
128+
impl_vvv!("lasx", lasx_xvbitset_h, ls::simd_bitset, m256i, u16x16);
129+
impl_vvv!("lasx", lasx_xvbitset_w, ls::simd_bitset, m256i, u32x8);
130+
impl_vvv!("lasx", lasx_xvbitset_d, ls::simd_bitset, m256i, u64x4);
131+
impl_vvv!("lasx", lasx_xvbitrev_b, ls::simd_bitrev, m256i, u8x32);
132+
impl_vvv!("lasx", lasx_xvbitrev_h, ls::simd_bitrev, m256i, u16x16);
133+
impl_vvv!("lasx", lasx_xvbitrev_w, ls::simd_bitrev, m256i, u32x8);
134+
impl_vvv!("lasx", lasx_xvbitrev_d, ls::simd_bitrev, m256i, u64x4);
123135

124136
impl_vuv!("lasx", lasx_xvslli_b, is::simd_shl, m256i, i8x32);
125137
impl_vuv!("lasx", lasx_xvslli_h, is::simd_shl, m256i, i16x16);

‎crates/core_arch/src/loongarch64/lsx/generated.rs‎

Lines changed: 0 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -43,14 +43,6 @@ unsafe extern "unadjusted" {
4343
fn __lsx_vsrlri_w(a: __v4i32, b: u32) -> __v4i32;
4444
#[link_name = "llvm.loongarch.lsx.vsrlri.d"]
4545
fn __lsx_vsrlri_d(a: __v2i64, b: u32) -> __v2i64;
46-
#[link_name = "llvm.loongarch.lsx.vbitclr.b"]
47-
fn __lsx_vbitclr_b(a: __v16u8, b: __v16u8) -> __v16u8;
48-
#[link_name = "llvm.loongarch.lsx.vbitclr.h"]
49-
fn __lsx_vbitclr_h(a: __v8u16, b: __v8u16) -> __v8u16;
50-
#[link_name = "llvm.loongarch.lsx.vbitclr.w"]
51-
fn __lsx_vbitclr_w(a: __v4u32, b: __v4u32) -> __v4u32;
52-
#[link_name = "llvm.loongarch.lsx.vbitclr.d"]
53-
fn __lsx_vbitclr_d(a: __v2u64, b: __v2u64) -> __v2u64;
5446
#[link_name = "llvm.loongarch.lsx.vbitclri.b"]
5547
fn __lsx_vbitclri_b(a: __v16u8, b: u32) -> __v16u8;
5648
#[link_name = "llvm.loongarch.lsx.vbitclri.h"]
@@ -59,14 +51,6 @@ unsafe extern "unadjusted" {
5951
fn __lsx_vbitclri_w(a: __v4u32, b: u32) -> __v4u32;
6052
#[link_name = "llvm.loongarch.lsx.vbitclri.d"]
6153
fn __lsx_vbitclri_d(a: __v2u64, b: u32) -> __v2u64;
62-
#[link_name = "llvm.loongarch.lsx.vbitset.b"]
63-
fn __lsx_vbitset_b(a: __v16u8, b: __v16u8) -> __v16u8;
64-
#[link_name = "llvm.loongarch.lsx.vbitset.h"]
65-
fn __lsx_vbitset_h(a: __v8u16, b: __v8u16) -> __v8u16;
66-
#[link_name = "llvm.loongarch.lsx.vbitset.w"]
67-
fn __lsx_vbitset_w(a: __v4u32, b: __v4u32) -> __v4u32;
68-
#[link_name = "llvm.loongarch.lsx.vbitset.d"]
69-
fn __lsx_vbitset_d(a: __v2u64, b: __v2u64) -> __v2u64;
7054
#[link_name = "llvm.loongarch.lsx.vbitseti.b"]
7155
fn __lsx_vbitseti_b(a: __v16u8, b: u32) -> __v16u8;
7256
#[link_name = "llvm.loongarch.lsx.vbitseti.h"]
@@ -75,14 +59,6 @@ unsafe extern "unadjusted" {
7559
fn __lsx_vbitseti_w(a: __v4u32, b: u32) -> __v4u32;
7660
#[link_name = "llvm.loongarch.lsx.vbitseti.d"]
7761
fn __lsx_vbitseti_d(a: __v2u64, b: u32) -> __v2u64;
78-
#[link_name = "llvm.loongarch.lsx.vbitrev.b"]
79-
fn __lsx_vbitrev_b(a: __v16u8, b: __v16u8) -> __v16u8;
80-
#[link_name = "llvm.loongarch.lsx.vbitrev.h"]
81-
fn __lsx_vbitrev_h(a: __v8u16, b: __v8u16) -> __v8u16;
82-
#[link_name = "llvm.loongarch.lsx.vbitrev.w"]
83-
fn __lsx_vbitrev_w(a: __v4u32, b: __v4u32) -> __v4u32;
84-
#[link_name = "llvm.loongarch.lsx.vbitrev.d"]
85-
fn __lsx_vbitrev_d(a: __v2u64, b: __v2u64) -> __v2u64;
8662
#[link_name = "llvm.loongarch.lsx.vbitrevi.b"]
8763
fn __lsx_vbitrevi_b(a: __v16u8, b: u32) -> __v16u8;
8864
#[link_name = "llvm.loongarch.lsx.vbitrevi.h"]
@@ -1197,34 +1173,6 @@ pub fn lsx_vsrlri_d<const IMM6: u32>(a: m128i) -> m128i {
11971173
unsafe { transmute(__lsx_vsrlri_d(transmute(a), IMM6)) }
11981174
}
11991175

1200-
#[inline]
1201-
#[target_feature(enable = "lsx")]
1202-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1203-
pub fn lsx_vbitclr_b(a: m128i, b: m128i) -> m128i {
1204-
unsafe { transmute(__lsx_vbitclr_b(transmute(a), transmute(b))) }
1205-
}
1206-
1207-
#[inline]
1208-
#[target_feature(enable = "lsx")]
1209-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1210-
pub fn lsx_vbitclr_h(a: m128i, b: m128i) -> m128i {
1211-
unsafe { transmute(__lsx_vbitclr_h(transmute(a), transmute(b))) }
1212-
}
1213-
1214-
#[inline]
1215-
#[target_feature(enable = "lsx")]
1216-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1217-
pub fn lsx_vbitclr_w(a: m128i, b: m128i) -> m128i {
1218-
unsafe { transmute(__lsx_vbitclr_w(transmute(a), transmute(b))) }
1219-
}
1220-
1221-
#[inline]
1222-
#[target_feature(enable = "lsx")]
1223-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1224-
pub fn lsx_vbitclr_d(a: m128i, b: m128i) -> m128i {
1225-
unsafe { transmute(__lsx_vbitclr_d(transmute(a), transmute(b))) }
1226-
}
1227-
12281176
#[inline]
12291177
#[target_feature(enable = "lsx")]
12301178
#[rustc_legacy_const_generics(1)]
@@ -1261,34 +1209,6 @@ pub fn lsx_vbitclri_d<const IMM6: u32>(a: m128i) -> m128i {
12611209
unsafe { transmute(__lsx_vbitclri_d(transmute(a), IMM6)) }
12621210
}
12631211

1264-
#[inline]
1265-
#[target_feature(enable = "lsx")]
1266-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1267-
pub fn lsx_vbitset_b(a: m128i, b: m128i) -> m128i {
1268-
unsafe { transmute(__lsx_vbitset_b(transmute(a), transmute(b))) }
1269-
}
1270-
1271-
#[inline]
1272-
#[target_feature(enable = "lsx")]
1273-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1274-
pub fn lsx_vbitset_h(a: m128i, b: m128i) -> m128i {
1275-
unsafe { transmute(__lsx_vbitset_h(transmute(a), transmute(b))) }
1276-
}
1277-
1278-
#[inline]
1279-
#[target_feature(enable = "lsx")]
1280-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1281-
pub fn lsx_vbitset_w(a: m128i, b: m128i) -> m128i {
1282-
unsafe { transmute(__lsx_vbitset_w(transmute(a), transmute(b))) }
1283-
}
1284-
1285-
#[inline]
1286-
#[target_feature(enable = "lsx")]
1287-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1288-
pub fn lsx_vbitset_d(a: m128i, b: m128i) -> m128i {
1289-
unsafe { transmute(__lsx_vbitset_d(transmute(a), transmute(b))) }
1290-
}
1291-
12921212
#[inline]
12931213
#[target_feature(enable = "lsx")]
12941214
#[rustc_legacy_const_generics(1)]
@@ -1325,34 +1245,6 @@ pub fn lsx_vbitseti_d<const IMM6: u32>(a: m128i) -> m128i {
13251245
unsafe { transmute(__lsx_vbitseti_d(transmute(a), IMM6)) }
13261246
}
13271247

1328-
#[inline]
1329-
#[target_feature(enable = "lsx")]
1330-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1331-
pub fn lsx_vbitrev_b(a: m128i, b: m128i) -> m128i {
1332-
unsafe { transmute(__lsx_vbitrev_b(transmute(a), transmute(b))) }
1333-
}
1334-
1335-
#[inline]
1336-
#[target_feature(enable = "lsx")]
1337-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1338-
pub fn lsx_vbitrev_h(a: m128i, b: m128i) -> m128i {
1339-
unsafe { transmute(__lsx_vbitrev_h(transmute(a), transmute(b))) }
1340-
}
1341-
1342-
#[inline]
1343-
#[target_feature(enable = "lsx")]
1344-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1345-
pub fn lsx_vbitrev_w(a: m128i, b: m128i) -> m128i {
1346-
unsafe { transmute(__lsx_vbitrev_w(transmute(a), transmute(b))) }
1347-
}
1348-
1349-
#[inline]
1350-
#[target_feature(enable = "lsx")]
1351-
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
1352-
pub fn lsx_vbitrev_d(a: m128i, b: m128i) -> m128i {
1353-
unsafe { transmute(__lsx_vbitrev_d(transmute(a), transmute(b))) }
1354-
}
1355-
13561248
#[inline]
13571249
#[target_feature(enable = "lsx")]
13581250
#[rustc_legacy_const_generics(1)]

‎crates/core_arch/src/loongarch64/lsx/portable.rs‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,18 @@ impl_vvv!("lsx", lsx_vsrl_b, ls::simd_shr, m128i, u8x16);
120120
impl_vvv!("lsx", lsx_vsrl_h, ls::simd_shr, m128i, u16x8);
121121
impl_vvv!("lsx", lsx_vsrl_w, ls::simd_shr, m128i, u32x4);
122122
impl_vvv!("lsx", lsx_vsrl_d, ls::simd_shr, m128i, u64x2);
123+
impl_vvv!("lsx", lsx_vbitclr_b, ls::simd_bitclr, m128i, u8x16);
124+
impl_vvv!("lsx", lsx_vbitclr_h, ls::simd_bitclr, m128i, u16x8);
125+
impl_vvv!("lsx", lsx_vbitclr_w, ls::simd_bitclr, m128i, u32x4);
126+
impl_vvv!("lsx", lsx_vbitclr_d, ls::simd_bitclr, m128i, u64x2);
127+
impl_vvv!("lsx", lsx_vbitset_b, ls::simd_bitset, m128i, u8x16);
128+
impl_vvv!("lsx", lsx_vbitset_h, ls::simd_bitset, m128i, u16x8);
129+
impl_vvv!("lsx", lsx_vbitset_w, ls::simd_bitset, m128i, u32x4);
130+
impl_vvv!("lsx", lsx_vbitset_d, ls::simd_bitset, m128i, u64x2);
131+
impl_vvv!("lsx", lsx_vbitrev_b, ls::simd_bitrev, m128i, u8x16);
132+
impl_vvv!("lsx", lsx_vbitrev_h, ls::simd_bitrev, m128i, u16x8);
133+
impl_vvv!("lsx", lsx_vbitrev_w, ls::simd_bitrev, m128i, u32x4);
134+
impl_vvv!("lsx", lsx_vbitrev_d, ls::simd_bitrev, m128i, u64x2);
123135

124136
impl_vuv!("lsx", lsx_vslli_b, is::simd_shl, m128i, i8x16);
125137
impl_vuv!("lsx", lsx_vslli_h, is::simd_shl, m128i, i16x8);

‎crates/core_arch/src/loongarch64/simd.rs‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,24 @@ pub(super) const unsafe fn simd_andn<T: Copy + const SimdExt>(a: T, b: T) -> T {
5151
is::simd_and(ls::simd_not(a), b)
5252
}
5353

54+
#[inline(always)]
55+
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
56+
pub(super) const unsafe fn simd_bitclr<T: Copy + const SimdExt>(a: T, b: T) -> T {
57+
ls::simd_andn(ls::simd_shl(ls::simd_splat(1), b), a)
58+
}
59+
60+
#[inline(always)]
61+
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
62+
pub(super) const unsafe fn simd_bitrev<T: Copy + const SimdExt>(a: T, b: T) -> T {
63+
is::simd_xor(ls::simd_shl(ls::simd_splat(1), b), a)
64+
}
65+
66+
#[inline(always)]
67+
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
68+
pub(super) const unsafe fn simd_bitset<T: Copy + const SimdExt>(a: T, b: T) -> T {
69+
is::simd_or(ls::simd_shl(ls::simd_splat(1), b), a)
70+
}
71+
5472
#[inline(always)]
5573
#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
5674
pub(super) const unsafe fn simd_fmsub<T: Copy>(a: T, b: T, c: T) -> T {

0 commit comments

Comments
 (0)