Correct some wrong uses of LLVM intrinsics

Author: sayantn

crates/core_arch/src/aarch64/neon/generated.rs

@@ -11903,7 +11903,7 @@ pub unsafe fn vluti4q_lane_s8<const LANE: i32>(a: int8x16_t, b: uint8x8_t) -> in
     unsafe extern "unadjusted" {
         #[cfg_attr(
             any(target_arch = "aarch64", target_arch = "arm64ec"),
-            link_name = "llvm.aarch64.neon.vluti4q.lane.v8i8"
+            link_name = "llvm.aarch64.neon.vluti4q.lane.v16i8"
         )]
         fn _vluti4q_lane_s8(a: int8x16_t, b: uint8x8_t, n: i32) -> int8x16_t;
     }

crates/core_arch/src/aarch64/prefetch.rs

@@ -2,7 +2,7 @@
 use stdarch_test::assert_instr;
 
 unsafe extern "unadjusted" {
-    #[link_name = "llvm.prefetch"]
+    #[link_name = "llvm.prefetch.p0"]
     fn prefetch(p: *const i8, rw: i32, loc: i32, ty: i32);
 }
 

crates/core_arch/src/aarch64/sve/generated.rs

@@ -20,8 +20,8 @@ pub use packed::*;
 
 #[allow(improper_ctypes)]
 unsafe extern "C" {
-    #[link_name = "llvm.nvvm.barrier0"]
-    fn syncthreads() -> ();
+    #[link_name = "llvm.nvvm.barrier.cta.sync.aligned.all"]
+    fn syncthreads(a: u32) -> ();
     #[link_name = "llvm.nvvm.read.ptx.sreg.ntid.x"]
     fn block_dim_x() -> u32;
     #[link_name = "llvm.nvvm.read.ptx.sreg.ntid.y"]
@@ -54,7 +54,7 @@ unsafe extern "C" {
 #[inline]
 #[unstable(feature = "stdarch_nvptx", issue = "111199")]
 pub unsafe fn _syncthreads() -> () {
-    syncthreads()
+    syncthreads(0)
 }
 
 /// x-th thread-block dimension.

crates/core_arch/src/nvptx/mod.rs

@@ -2,10 +2,10 @@
 use stdarch_test::assert_instr;
 
 unsafe extern "unadjusted" {
-    #[link_name = "llvm.wasm.memory.grow"]
-    fn llvm_memory_grow(mem: u32, pages: usize) -> usize;
-    #[link_name = "llvm.wasm.memory.size"]
-    fn llvm_memory_size(mem: u32) -> usize;
+    #[link_name = "llvm.wasm.memory.grow.i32"]
+    fn llvm_memory_grow(mem: u32, pages: u32) -> u32;
+    #[link_name = "llvm.wasm.memory.size.i32"]
+    fn llvm_memory_size(mem: u32) -> u32;
 }
 
 /// Corresponding intrinsic to wasm's [`memory.size` instruction][instr]
@@ -27,7 +27,7 @@ unsafe extern "unadjusted" {
 #[doc(alias("memory.size"))]
 pub fn memory_size<const MEM: u32>() -> usize {
     static_assert!(MEM == 0);
-    unsafe { llvm_memory_size(MEM) }
+    unsafe { llvm_memory_size(MEM) as usize }
 }
 
 /// Corresponding intrinsic to wasm's [`memory.grow` instruction][instr]
@@ -53,6 +53,6 @@ pub fn memory_size<const MEM: u32>() -> usize {
 pub fn memory_grow<const MEM: u32>(delta: usize) -> usize {
     unsafe {
         static_assert!(MEM == 0);
-        llvm_memory_grow(MEM, delta)
+        llvm_memory_grow(MEM, delta as u32) as usize
     }
 }

crates/core_arch/src/wasm32/memory.rs

@@ -2040,7 +2040,7 @@ unsafe extern "C" {
     fn stmxcsr(p: *mut i8);
     #[link_name = "llvm.x86.sse.ldmxcsr"]
     fn ldmxcsr(p: *const i8);
-    #[link_name = "llvm.prefetch"]
+    #[link_name = "llvm.prefetch.p0"]
     fn prefetch(p: *const i8, rw: i32, loc: i32, ty: i32);
     #[link_name = "llvm.x86.sse.cmp.ss"]
     fn cmpss(a: __m128, b: __m128, imm8: i8) -> __m128;

crates/core_arch/src/x86/sse.rs

@@ -13951,7 +13951,7 @@ intrinsics:
             - 'b: {neon_type[1]}'
             - 'n: i32'
           links:
-            - link: "llvm.aarch64.neon.vluti4q.lane.{neon_type[1]}"
+            - link: "llvm.aarch64.neon.vluti4q.lane.{neon_type[0]}"
               arch: aarch64,arm64ec
       - FnCall: ['_vluti4{neon_type[0].lane_nox}', [a, b, LANE]]
 
@@ -14002,7 +14002,7 @@ intrinsics:
             - 'b: {neon_type[1]}'
             - 'n: i32'
           links:
-            - link: "llvm.aarch64.neon.vluti4q.laneq.{neon_type[1]}"
+            - link: "llvm.aarch64.neon.vluti4q.laneq.{neon_type[0]}"
               arch: aarch64,arm64ec
       - FnCall: ['_vluti4{neon_type[0].laneq_nox}', [a, b, LANE]]
 

crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml

@@ -115,7 +115,7 @@ intrinsics:
     assert_instr: [[fcmla, "IMM_INDEX = 0, IMM_ROTATION = 90"]]
     compose:
       - LLVMLink:
-          name: fcmla.lane.x.{sve_type}
+          name: fcmla.lane.{sve_type}
           arguments:
             - "op1: {sve_type}"
             - "op2: {sve_type}"
@@ -4179,14 +4179,32 @@ intrinsics:
       ["inactive: {sve_type[0]}", "pg: {max_predicate}", "op: {sve_type[1]}"]
     return_type: "{sve_type[0]}"
     types:
-      - [[f32, f64], [i32, u32, i64, u64]]
+      - [f32, [i64, u64]]
+      - [f64, [i32, u32]]
     zeroing_method: { drop: inactive }
     substitutions:
       convert_from: { match_kind: "{type[1]}", default: s, unsigned: u }
     assert_instr: ["{convert_from}cvtf"]
     compose:
       - LLVMLink:
           name: "{convert_from}cvtf.{type[0]}{type[1]}"
+  
+  - name: svcvt_{type[0]}[_{type[1]}]{_mxz}
+    attr: [*sve-unstable]
+    doc: Floating-point convert
+    arguments:
+      ["inactive: {sve_type[0]}", "pg: {max_predicate}", "op: {sve_type[1]}"]
+    return_type: "{sve_type[0]}"
+    types:
+      - [f32, [i32, u32]]
+      - [f64, [i64, u64]]
+    zeroing_method: { drop: inactive }
+    substitutions:
+      convert_from: { match_kind: "{type[1]}", default: s, unsigned: u }
+    assert_instr: ["{convert_from}cvtf"]
+    compose:
+      - LLVMLink:
+          name: "{convert_from}cvtf.{sve_type[0]}.{sve_type[1]}"
 
   - name: svcvt_{type[0]}[_{type[1]}]{_mxz}
     attr: [*sve-unstable]
@@ -4195,13 +4213,30 @@ intrinsics:
       ["inactive: {sve_type[0]}", "pg: {max_predicate}", "op: {sve_type[1]}"]
     return_type: "{sve_type[0]}"
     types:
-      - [[i32, u32, i64, u64], [f32, f64]]
+      - [[i32, u32], f64]
+      - [[i64, u64], f32]
     zeroing_method: { drop: inactive }
     substitutions:
       convert_to: { match_kind: "{type[0]}", default: s, unsigned: u }
     assert_instr: ["fcvtz{convert_to}"]
     compose:
       - LLVMLink: { name: "fcvtz{convert_to}.{type[0]}{type[1]}" }
+  
+  - name: svcvt_{type[0]}[_{type[1]}]{_mxz}
+    attr: [*sve-unstable]
+    doc: Floating-point convert
+    arguments:
+      ["inactive: {sve_type[0]}", "pg: {max_predicate}", "op: {sve_type[1]}"]
+    return_type: "{sve_type[0]}"
+    types:
+      - [[i32, u32], f32]
+      - [[i64, u64], f64]
+    zeroing_method: { drop: inactive }
+    substitutions:
+      convert_to: { match_kind: "{type[0]}", default: s, unsigned: u }
+    assert_instr: ["fcvtz{convert_to}"]
+    compose:
+      - LLVMLink: { name: "fcvtz{convert_to}.{sve_type[0]}.{sve_type[1]}" }
 
   - name: svcvt_{type[0]}[_{type[1]}]{_mxz}
     attr: [*sve-unstable]
@@ -4356,7 +4391,7 @@ intrinsics:
     return_type: svbool_t
     assert_instr: [and]
     compose:
-      - LLVMLink: { name: "and.z.nvx16i1" }
+      - LLVMLink: { name: "and.z.nxv16i1" }
 
   - name: svmov[_b]_z
     attr: [*sve-unstable]
@@ -4386,7 +4421,7 @@ intrinsics:
     return_type: svbool_t
     assert_instr: [bic]
     compose:
-      - LLVMLink: { name: "bic.z.nvx16i1" }
+      - LLVMLink: { name: "bic.z.nxv16i1" }
 
   - name: sveor[{_n}_{type}]{_mxz}
     attr: [*sve-unstable]
@@ -4417,7 +4452,7 @@ intrinsics:
     return_type: svbool_t
     assert_instr: [eor]
     compose:
-      - LLVMLink: { name: "eor.z.nvx16i1" }
+      - LLVMLink: { name: "eor.z.nxv16i1" }
 
   - name: svnot[_{type}]{_mxz}
     attr: [*sve-unstable]
@@ -4497,7 +4532,7 @@ intrinsics:
     return_type: svbool_t
     assert_instr: [orr]
     compose:
-      - LLVMLink: { name: "orr.z.nvx16i1" }
+      - LLVMLink: { name: "orr.z.nxv16i1" }
 
   - name: svorn[_b]_z
     attr: [*sve-unstable]
@@ -4506,7 +4541,7 @@ intrinsics:
     return_type: svbool_t
     assert_instr: [orn]
     compose:
-      - LLVMLink: { name: "orn.z.nvx16i1" }
+      - LLVMLink: { name: "orn.z.nxv16i1" }
 
   - name: svlsl[{_n}_{type[0]}]{_mxz}
     attr: [*sve-unstable]
@@ -4749,7 +4784,7 @@ intrinsics:
     assert_instr: [frecpx]
     zeroing_method: { drop: inactive }
     compose:
-      - LLVMLink: { name: "frecpx.x.{sve_type}" }
+      - LLVMLink: { name: "frecpx.{sve_type}" }
 
   - name: svrsqrte[_{type}]
     attr: [*sve-unstable]
@@ -5115,7 +5150,7 @@ intrinsics:
     types: [[f32, u32], [f64, u64]]
     assert_instr: [fexpa]
     compose:
-      - LLVMLink: { name: "fexpa.x.{sve_type[0]} " }
+      - LLVMLink: { name: "fexpa.x.{sve_type[0]}" }
 
   - name: svscale[{_n}_{type[0]}]{_mxz}
     attr: [*sve-unstable]
@@ -5139,7 +5174,7 @@ intrinsics:
     types: [f32]
     assert_instr: [fmmla]
     compose:
-      - LLVMLink: { name: "fmmla.{sve_type}" }
+      - LLVMLink: { name: "fmmla.{sve_type}.{sve_type}" }
 
   - name: svmmla[_{type}]
     attr: [*sve-unstable]
@@ -5150,7 +5185,7 @@ intrinsics:
     types: [f64]
     assert_instr: [fmmla]
     compose:
-      - LLVMLink: { name: "fmmla.{sve_type}" }
+      - LLVMLink: { name: "fmmla.{sve_type}.{sve_type}" }
 
   - name: svmmla[_{type[0]}]
     attr: [*sve-unstable]