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[Super issue] upgrade to recursion v2 #1266

Description

@hero78119

Recursion dominates ethproofs e2e around 50% or more compared with base-layer. See benchmark ceno-reth.

Ceno recursion sticks to in-house fork openvm v1.4.1 which is quite old and prover performance degrades compared with the multivariate version (ceno base layer).

OpenVM is WIP upgrading to multivariate develop-v2. To boost ceno recursion performance, we upgrade recursion to openvm v2. Once completed, we can plan to swap the recursion backend proving to ceno as well.

Implementation lives in ceno_recursion_v2/. Detailed plan: ceno_recursion_v2/PLAN.md.


Architecture

The v2 recursive verifier is a multi-AIR STARK circuit (25+ AIRs). Each protocol step is its own module with typed buses. The openvm v2 prover generates the proof; Ceno owns the AIR constraints and trace generation.

proof-shape → GKR tower → main sumcheck → batch constraint → jagged reduction → basefold

Phases

Phase 0: Integration stack (current priority)

Build end-to-end test: read proofs → preflight → tracegen → prove → verify.
All modules registered (placeholder traces OK). Log proving time + proof size.

  • Enable all modules in system orchestration
  • Every AIR registered and contributes a trace
  • Integration test passes with 1-proof and 2-proof inputs
  • Performance logging (proving time, proof size, per-AIR trace heights)

Phase 1: Complete existing AIR wiring

Make AIR traces real (not placeholder), module by module.

  • Proof shape tracegen from preflight metadata
  • Re-enable batch constraint (fix preflight/tracegen alignment)
  • Wire VmPvsAir buses (public_values_bus, cached_commit_bus)
  • ZKVM type bridges (convert_proof_from_zkvm, convert_vk_from_zkvm)
  • Inner circuit tracegen (VerifierPvsAir, DeferralPvsAir)

Phase 2: Jagged Reduction + Basefold

PCS verification pipeline — critical path for soundness.

  • Write Basefold module spec
  • Implement 7 Jagged AIRs per spec
  • Implement Basefold AIR(s)

Phase 3: Multi-proof aggregation

  • Self-recursive prover (RecursionVk ↔ local VK bridge)
  • Binary tree aggregation: leaf → internal → root
  • Cross-shard connector chaining + EC sum in VmPvsAir

AIR inventory (25+)

Module Count Status
Transcript 1 ✅ Done
Tower/GKR 5 ✅ Done
Main 2 ✅ Done
Proof Shape 2 ⚠️ AIR done, tracegen placeholder
Batch Constraint 3 ⚠️ AIR done, module disabled
Inner Circuit 4 ⚠️ 90%, bus wiring TODO
Jagged Reduction 7 ❌ Not started (spec exists)
Basefold 1+ ❌ Not started (no spec)

Base layer changes

Reduce dynamism for recursion implementation:

  • make num_instance size fixed as size 2 array, constrain num_instance[1] if possible
  • make zkvm proof per chip to be 1 instead of vector
  • main-sumcheck chip various degree => make different degree support for sumcheck

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