loader,smp: Enable caches on all cores before using cache coherency

Ensure that caches are activated on all cores before accessing cached
shared data.
Caches are enabled within arch_mmu_enable(), so sharablility attributes
are consistenly configured.

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>

Author: bruelc

loader/src/aarch64/cpus.c

@@ -8,6 +8,7 @@
 #include <stdint.h>
 
 #include "smc.h"
+#include "../arch.h"
 #include "../cpus.h"
 #include "../cutil.h"
 #include "../loader.h"
@@ -110,6 +111,14 @@ void arm_secondary_cpu_entry(int logical_cpu, uint64_t mpidr_el1)
 
     plat_save_hw_id(logical_cpu, mpidr_el1);
 
+    int r = arch_mmu_enable(logical_cpu);
+    if (r != 0) {
+        LDR_PRINT("ERROR", logical_cpu, "failed to enable MMU: ");
+        puthex32(r);
+        puts("\n");
+        goto fail;
+    }
+
     start_kernel(logical_cpu);
 
 fail:

loader/src/loader.c

@@ -100,15 +100,6 @@ static int print_lock = 0;
 
 void start_kernel(int logical_cpu)
 {
-    LDR_PRINT("INFO", logical_cpu, "enabling MMU\n");
-    int r = arch_mmu_enable(logical_cpu);
-    if (r != 0) {
-        LDR_PRINT("ERROR", logical_cpu, "failed to enable MMU: ");
-        puthex32(r);
-        puts("\n");
-        for (;;) {}
-    }
-
     LDR_PRINT("INFO", logical_cpu, "jumping to kernel\n");
 
 #ifdef CONFIG_PRINTING
@@ -175,6 +166,13 @@ int main(void)
     puthex32(plat_get_active_cpus());
     puts("\n");
 
+    r = arch_mmu_enable(0);
+    if (r != 0) {
+        LDR_PRINT("ERROR", 0, "failed to enable MMU: ");
+        puthex32(r);
+        fail();
+    }
+
     for (int cpu = 1; cpu < plat_get_active_cpus(); cpu++) {
         r = plat_start_cpu(cpu);
         if (r != 0) {