@@ -139,35 +139,6 @@ simde_vcvt_f64_f32(simde_float32x2_t a) {
139139 #define vcvt_f64_f32 (a ) simde_vcvt_f64_f32(a)
140140#endif
141141
142- /* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
143- * https://github.com/simd-everywhere/simde/issues/1099
144- SIMDE_FUNCTION_ATTRIBUTES
145- int16_t
146- simde_vcvth_s16_f16(simde_float16_t a) {
147- #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
148- return vcvth_s16_f16(a);
149- #elif defined(SIMDE_FAST_CONVERSION_RANGE)
150- return HEDLEY_STATIC_CAST(int16_t,
151- simde_float16_to_float32(a));
152- #else
153- simde_float32 af = simde_float16_to_float32(a);
154- if (HEDLEY_UNLIKELY(af <= HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
155- return INT16_MIN;
156- } else if (HEDLEY_UNLIKELY(af >= HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
157- return INT16_MAX;
158- } else if (HEDLEY_UNLIKELY(simde_isnanhf(a))) {
159- return 0;
160- } else {
161- return HEDLEY_STATIC_CAST(int16_t, af);
162- }
163- #endif
164- }
165- #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
166- #undef vcvth_s16_f16
167- #define vcvth_s16_f16(a) simde_vcvth_s16_f16(a)
168- #endif
169- */
170-
171142SIMDE_FUNCTION_ATTRIBUTES
172143uint16_t
173144simde_vcvth_u16_f16 (simde_float16_t a ) {
@@ -547,35 +518,6 @@ simde_vcvth_f16_u16(uint16_t a) {
547518 #define vcvth_f16_u16 (a ) simde_vcvth_f16_u16(a)
548519#endif
549520
550- /* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
551- * https://github.com/simd-everywhere/simde/issues/1099
552- SIMDE_FUNCTION_ATTRIBUTES
553- simde_int16x4_t
554- simde_vcvt_s16_f16(simde_float16x4_t a) {
555- #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
556- return vcvt_s16_f16(a);
557- #else
558- simde_float16x4_private a_ = simde_float16x4_to_private(a);
559- simde_int16x4_private r_;
560-
561- #if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FLOAT16_VECTOR)
562- SIMDE_CONVERT_VECTOR_(r_.values, a_.values);
563- #else
564- SIMDE_VECTORIZE
565- for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
566- r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
567- }
568- #endif
569-
570- return simde_int16x4_from_private(r_);
571- #endif
572- }
573- #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
574- #undef vcvt_s16_f16
575- #define vcvt_s16_f16(a) simde_vcvt_s16_f16(a)
576- #endif
577- */
578-
579521SIMDE_FUNCTION_ATTRIBUTES
580522simde_int32x2_t
581523simde_vcvt_s32_f32 (simde_float32x2_t a ) {
@@ -707,35 +649,6 @@ simde_vcvt_u64_f64(simde_float64x1_t a) {
707649 #define vcvt_u64_f64 (a ) simde_vcvt_u64_f64(a)
708650#endif
709651
710- /* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
711- * https://github.com/simd-everywhere/simde/issues/1099
712- SIMDE_FUNCTION_ATTRIBUTES
713- simde_int16x8_t
714- simde_vcvtq_s16_f16(simde_float16x8_t a) {
715- #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
716- return vcvtq_s16_f16(a);
717- #else
718- simde_float16x8_private a_ = simde_float16x8_to_private(a);
719- simde_int16x8_private r_;
720-
721- #if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FLOAT16_VECTOR)
722- SIMDE_CONVERT_VECTOR_(r_.values, a_.values);
723- #else
724- SIMDE_VECTORIZE
725- for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
726- r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
727- }
728- #endif
729-
730- return simde_int16x8_from_private(r_);
731- #endif
732- }
733- #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
734- #undef vcvtq_s16_f16
735- #define vcvtq_s16_f16(a) simde_vcvtq_s16_f16(a)
736- #endif
737- */
738-
739652SIMDE_FUNCTION_ATTRIBUTES
740653simde_int32x4_t
741654simde_vcvtq_s32_f32 (simde_float32x4_t a ) {
@@ -1392,35 +1305,6 @@ simde_vcvtq_f64_u64(simde_uint64x2_t a) {
13921305 #define vcvtq_f64_u64 (a ) simde_vcvtq_f64_u64(a)
13931306#endif
13941307
1395- /* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
1396- * https://github.com/simd-everywhere/simde/issues/1099
1397- SIMDE_FUNCTION_ATTRIBUTES
1398- int16_t
1399- simde_vcvtah_s16_f16(simde_float16_t a) {
1400- #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
1401- return vcvtah_s16_f16(a);
1402- #elif defined(SIMDE_FAST_CONVERSION_RANGE)
1403- return HEDLEY_STATIC_CAST(int16_t,
1404- simde_math_roundf(simde_float16_to_float32(a)));
1405- #else
1406- simde_float32 af = simde_float16_to_float32(a);
1407- if (HEDLEY_UNLIKELY(af <= HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
1408- return INT16_MIN;
1409- } else if (HEDLEY_UNLIKELY(af >= HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
1410- return INT16_MAX;
1411- } else if (HEDLEY_UNLIKELY(simde_isnanhf(a))) {
1412- return 0;
1413- } else {
1414- return HEDLEY_STATIC_CAST(int16_t, simde_math_roundf(af));
1415- }
1416- #endif
1417- }
1418- #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
1419- #undef vcvtah_s16_f16
1420- #define vcvtah_s16_f16(a) simde_vcvtah_s16_f16(a)
1421- #endif
1422- */
1423-
14241308SIMDE_FUNCTION_ATTRIBUTES
14251309uint16_t
14261310simde_vcvtah_u16_f16 (simde_float16_t a ) {
@@ -1648,31 +1532,6 @@ simde_vcvtas_u32_f32(simde_float32 a) {
16481532 #define vcvtas_u32_f32 (a ) simde_vcvtas_u32_f32(a)
16491533#endif
16501534
1651- /* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
1652- * https://github.com/simd-everywhere/simde/issues/1099
1653- SIMDE_FUNCTION_ATTRIBUTES
1654- simde_int16x4_t
1655- simde_vcvta_s16_f16(simde_float16x4_t a) {
1656- #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
1657- return vcvta_s16_f16(a);
1658- #else
1659- simde_float16x4_private a_ = simde_float16x4_to_private(a);
1660- simde_int16x4_private r_;
1661-
1662- SIMDE_VECTORIZE
1663- for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
1664- r_.values[i] = simde_vcvtah_s16_f16(a_.values[i]);
1665- }
1666-
1667- return simde_int16x4_from_private(r_);
1668- #endif
1669- }
1670- #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
1671- #undef vcvta_s16_f16
1672- #define vcvta_s16_f16(a) simde_vcvta_s16_f16(a)
1673- #endif
1674- */
1675-
16761535SIMDE_FUNCTION_ATTRIBUTES
16771536simde_uint16x4_t
16781537simde_vcvta_u16_f16 (simde_float16x4_t a ) {
@@ -1761,31 +1620,6 @@ simde_vcvta_s32_f32(simde_float32x2_t a) {
17611620 #define vcvta_s32_f32 (a ) simde_vcvta_s32_f32(a)
17621621#endif
17631622
1764- /* Disabled until we fix the FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics
1765- * https://github.com/simd-everywhere/simde/issues/1099
1766- SIMDE_FUNCTION_ATTRIBUTES
1767- simde_int16x8_t
1768- simde_vcvtaq_s16_f16(simde_float16x8_t a) {
1769- #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
1770- return vcvtaq_s16_f16(a);
1771- #else
1772- simde_float16x8_private a_ = simde_float16x8_to_private(a);
1773- simde_int16x8_private r_;
1774-
1775- SIMDE_VECTORIZE
1776- for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
1777- r_.values[i] = simde_vcvtah_s16_f16(a_.values[i]);
1778- }
1779-
1780- return simde_int16x8_from_private(r_);
1781- #endif
1782- }
1783- #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
1784- #undef vcvtaq_s16_f16
1785- #define vcvtaq_s16_f16(a) simde_vcvtaq_s16_f16(a)
1786- #endif
1787- */
1788-
17891623SIMDE_FUNCTION_ATTRIBUTES
17901624simde_uint16x8_t
17911625simde_vcvtaq_u16_f16 (simde_float16x8_t a ) {
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