[HLD] Add support for port loopback

[Keshavg-marvell]

Add support for port loopback

[mssonicbld]

/azp run

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[Copilot]

Pull request overview

Adds a new High Level Design (HLD) document for supporting port-level loopback mode configuration in SONiC, including architecture/flow diagrams and proposed CLI/DB/SAI/YANG interactions.

Changes:

• Adds an HLD Markdown document describing port loopback modes, DB schema updates, and sequence flows.
• Adds draw.io-generated diagrams for port loopback modes and architectural flow.
• Documents CLI commands, SAI API usage, and a unit test plan for downstream implementation repos.

Reviewed changes

Copilot reviewed 1 out of 3 changed files in this pull request and generated 2 comments.

File	Description
doc/port-loopback/Port_Loopback_HLD.md	Defines the port loopback feature HLD: requirements, DB schema, SAI API usage, CLI/YANG, warmboot/fastboot impact, and test plan.
doc/port-loopback/port_loopback_architectural_flow.png	Architectural flow diagram (draw.io PNG with embedded mxfile).
doc/port-loopback/port_loopback_diagram.png	Representational diagram of port loopback modes (draw.io PNG with embedded mxfile).

[mssonicbld]

/azp run

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[mssonicbld]

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[arpit-nexthop]

Can we include gearbox also in the design, to avoid another HLD later. That way we can conclude on the CLI and basic methodology

[Keshavg-marvell]

Capturing comments from community L1 meeting:
From @prgeor @eddyk-nvidia Port loopback capability may vary across individual ports and therefore should be published at the per‑port level, rather than at the switch level. The current mechanism using sai_query_attribute_enum_values_capability for SAI_PORT_ATTR_LOOPBACK_MODE exposes switch‑level capabilities

Notes from @keshav. Currently, SAI does not define a port level capability attribute for loopback modes, unlike other port capabilities such as FEC mode, which are exposed via attributes like SAI_PORT_ATTR_SUPPORTED_FEC_MODE. so
this require defining a new port attribute in SAI.

[Keshavg-marvell]

Notes from @prgeor @eddyk-nvidia Querying capability per port on large-radix switches (128, 512, or even 1K ports) would be expensive, and suggested exploring to use SAI-level bulk capability query that returns all port capabilities in one call.