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dt-bindings: display: Add yamls for JH7110 display system
StarFive SoCs JH7110 display system: lcd-controller bases verisilicon dc8200 IP, and hdmi bases Innosilicon IP. Add bindings for them. Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
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‎Documentation/devicetree/bindings/display/starfive/starfive,display-subsystem.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/starfive/starfive,display-subsystem.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Starfive DRM master device
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maintainers:
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- Keith Zhao <keith.zhao@starfivetech.com>
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- ShengYang Chen <shengyang.chen@starfivetech.com>
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description:
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The Starfive DRM master device is a virtual device needed to list all
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display controller or other display interface nodes that comprise the
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graphics subsystem.
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properties:
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compatible:
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const: starfive,display-subsystem
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description: |
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Should contain a list of phandles pointing to display interface ports
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of display controller devices. Display controller definitions as defined
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in Documentation/devicetree/bindings/display/starfive/
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starfive,jh7110-dc8200.yaml
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required:
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- compatible
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- ports
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additionalProperties: false
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examples:
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- |
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display-subsystem {
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compatible = "starfive,display-subsystem";
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ports = <&dc_out>;
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};

‎Documentation/devicetree/bindings/display/starfive/starfive,jh7110-dc8200.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/starfive/starfive,jh7110-dc8200.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive display controller
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description:
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The StarFive SoC uses the display controller based on Verisilicon IP
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to transfer the image data from a video memory
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buffer to an external LCD interface.
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maintainers:
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- Keith Zhao <keith.zhao@starfivetech.com>
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properties:
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compatible:
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const: starfive,jh7110-dc8200
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reg:
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maxItems: 3
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interrupts:
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items:
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- description: The interrupt will be generated when DC finish one frame
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clocks:
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items:
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- description: Clock for display system noc bus.
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- description: Pixel clock for display channel 0.
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- description: Pixel clock for display channel 1.
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- description: Clock for axi interface of display controller.
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- description: Core clock for display controller.
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- description: Clock for ahb interface of display controller.
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- description: External HDMI pixel clock.
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- description: Parent clock for pixel clock
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clock-names:
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items:
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- const: vout_noc_disp
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- const: vout_pix0
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- const: vout_pix1
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- const: vout_axi
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- const: vout_core
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- const: vout_vout_ahb
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- const: hdmitx0_pixel
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- const: vout_dc8200
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resets:
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items:
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- description: Reset for axi interface of display controller.
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- description: Reset for ahb interface of display controller.
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- description: Core reset of display controller.
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reset-names:
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items:
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- const: vout_axi
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- const: vout_ahb
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- const: vout_core
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port:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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A port node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- reset-names
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- port
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additionalProperties: false
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examples:
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- |
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dc8200: lcd-controller@29400000 {
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compatible = "starfive,jh7110-dc8200";
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reg = <0x29400000 0x100>, <0x29400800 0x2000>, <0x295b0000 0x90>;
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interrupts = <95>;
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clocks = <&syscrg 60>,
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<&voutcrg 7>,
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<&voutcrg 8>,
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<&voutcrg 4>,
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<&voutcrg 5>,
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<&voutcrg 6>,
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<&hdmitx0_pixelclk>,
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<&voutcrg 1>;
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clock-names = "vout_noc_disp", "vout_pix0", "vout_pix1",
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"vout_axi", "vout_core", "vout_vout_ahb",
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"hdmitx0_pixel","vout_dc8200";
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resets = <&voutcrg 0>, <&voutcrg 1>, <&voutcrg 2>;
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reset-names = "vout_axi", "vout_ahb", "vout_core";
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dc_out: port {
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#address-cells = <1>;
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#size-cells = <0>;
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dc_out_hdmi: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&hdmi_in_dc>;
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};
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};
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};

‎Documentation/devicetree/bindings/display/starfive/starfive,jh7110-inno-hdmi.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/starfive/starfive,jh7110-inno-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Starfive JH7110 HDMI controller
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description:
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The StarFive JH7110 SoC uses the HDMI signal transmiter based on innosilicon IP
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to generate HDMI signal from its input and transmit the signal to the screen.
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maintainers:
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- Keith Zhao <keith.zhao@starfivetech.com>
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properties:
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compatible:
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const: "starfive,jh7110-inno-hdmi"
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reg:
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minItems: 1
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interrupts:
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items:
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- description: The HDMI hot plug detection interrupt.
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clocks:
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items:
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- description: System clock of HDMI module.
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- description: Mclk clock of HDMI audio.
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- description: Bclk clock of HDMI audio.
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- description: Pixel clock generated by HDMI module.
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clock-names:
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items:
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- const: sysclk
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- const: mclk
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- const: bclk
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- const: pclk
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resets:
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items:
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- description: Reset for HDMI module.
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reset-names:
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items:
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- const: hdmi_tx
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'#sound-dai-cells':
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const: 0
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port:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Should contain a remote endpoint phandle of display controller device.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- reset-names
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- '#sound-dai-cells'
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- port
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additionalProperties: false
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examples:
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- |
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hdmi: hdmi@29590000 {
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compatible = "starfive,jh7110-inno-hdmi";
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reg = <0x29590000 0x4000>;
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interrupts = <99>;
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clocks = <&voutcrg 17>,
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<&voutcrg 15>,
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<&voutcrg 16>,
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<&hdmitx0_pixelclk>;
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clock-names = "sysclk", "mclk","bclk","pclk";
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resets = <&voutcrg 9>;
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reset-names = "hdmi_tx";
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#sound-dai-cells = <0>;
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hdmi_in: port {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in_dc: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dc_out_hdmi>;
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};
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};
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};

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