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Merge pull request #19 from rota1001/add-rv64-support
Add riscv64 support
2 parents 0ccc5cb + 0000a36 commit 26de02c

20 files changed

Lines changed: 362 additions & 61 deletions

README.md

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@@ -267,6 +267,7 @@ with
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- x86_64
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- aarch64
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- riscv64 (Only the trap mode and the seccomp mode are available)
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## License
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docs/architecture.md

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@@ -174,6 +174,8 @@ host-kernel calls. `mmap` and `epoll_*` are deliberately excluded
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because they need W^X enforcement, shadow validation, or FD-table
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gating that the fast-path cannot perform.
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On **riscv64**, the rewrite mode is not available now.
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Each site is classified as WRAPPER (simple `syscall; ret` pattern,
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eligible for inline virtualized return: getpid=1, gettid=1, getppid=0)
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or COMPLEX (result consumed internally by helpers like `raise()` that

mk/toolchain.mk

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@@ -29,6 +29,11 @@ CFLAGS += -Wno-unused-parameter
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CFLAGS += -Iinclude -Isrc
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LDFLAGS += -Wl,-z,noexecstack -Wl,-z,separate-code
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# Disable link relaxation of riscv64 architecture to prevent long link time
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ifeq ($(ARCH),riscv64)
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LDFLAGS += -Wl,--no-relax
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endif
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# Build mode from Kconfig (fallback to BUILD= for unconfigured builds)
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ifeq ($(CONFIG_BUILD_RELEASE),y)
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CFLAGS += -O2 -DNDEBUG

scripts/alpine-sha256.txt

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@@ -1,2 +1,3 @@
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55ea3e5a7c2c35e6268c5dcbb8e45a9cd5b0e372e7b4e798499a526834f7ed90 alpine-minirootfs-3.21.0-x86_64.tar.gz
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f31202c4070c4ef7de9e157e1bd01cb4da3a2150035d74ea5372c5e86f1efac1 alpine-minirootfs-3.21.0-aarch64.tar.gz
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b2c5ed2be586aebd2da5dd13dbc96bc8cc41b72e517d0726dfbbb0a9810e66d6 alpine-minirootfs-3.21.0-riscv64.tar.gz

src/dispatch-misc.c

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@@ -239,6 +239,8 @@ struct kbox_dispatch forward_uname(const struct kbox_syscall_request *req,
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snprintf(uts.machine, sizeof(uts.machine), "x86_64");
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#elif defined(__aarch64__)
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snprintf(uts.machine, sizeof(uts.machine), "aarch64");
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#elif (defined(__riscv) && __riscv_xlen == 64)
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snprintf(uts.machine, sizeof(uts.machine), "riscv64");
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#else
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snprintf(uts.machine, sizeof(uts.machine), "unknown");
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#endif

src/elf.c

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@@ -417,7 +417,7 @@ int kbox_build_elf_load_plan(const unsigned char *buf,
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p_memsz = read_le64(buf + off + P_MEMSZ_OFF);
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p_align = read_le64(buf + off + P_ALIGN_OFF);
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if (p_filesz > p_memsz)
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if (p_memsz && p_filesz > p_memsz)
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return -1;
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/* Validate that p_offset + p_filesz does not overflow. We do

src/image.c

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@@ -490,8 +490,8 @@ static const struct kbox_host_nrs *select_host_nrs(void)
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{
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#if defined(__x86_64__)
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return &HOST_NRS_X86_64;
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#elif defined(__aarch64__)
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return &HOST_NRS_AARCH64;
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#elif defined(__aarch64__) || (defined(__riscv) && (__riscv_xlen == 64))
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return &HOST_NRS_GENERIC;
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#else
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return NULL;
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#endif

src/loader-entry.c

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@@ -17,6 +17,9 @@ static int machine_to_entry_arch(uint16_t machine,
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case 0xb7:
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*arch_out = KBOX_LOADER_ENTRY_ARCH_AARCH64;
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return 0;
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case 0xf3:
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*arch_out = KBOX_LOADER_ENTRY_ARCH_RISCV64;
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return 0;
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default:
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return -1;
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}

src/loader-entry.h

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@@ -9,6 +9,7 @@
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enum kbox_loader_entry_arch {
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KBOX_LOADER_ENTRY_ARCH_X86_64,
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KBOX_LOADER_ENTRY_ARCH_AARCH64,
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KBOX_LOADER_ENTRY_ARCH_RISCV64
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};
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struct kbox_loader_entry_state {

src/loader-transfer.c

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@@ -89,6 +89,24 @@ kbox_loader_transfer_to_guest(const struct kbox_loader_transfer_state *state)
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: "r"(sp), "r"(x0), "r"(x1), "r"(x2), "r"(x3), "r"(x4), "r"(x5),
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"r"(x16)
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: "memory");
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#elif defined(__riscv) && (__riscv_xlen == 64)
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if (state->arch != KBOX_LOADER_ENTRY_ARCH_RISCV64)
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__builtin_trap();
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register uint64_t a0 __asm__("a0") = state->regs[0];
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register uint64_t a1 __asm__("a1") = state->regs[1];
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register uint64_t a2 __asm__("a2") = state->regs[2];
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register uint64_t a3 __asm__("a3") = state->regs[3];
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register uint64_t a4 __asm__("a4") = state->regs[4];
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register uint64_t a5 __asm__("a5") = state->regs[5];
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register uint64_t t0 __asm__("t0") = state->pc;
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uint64_t sp = state->sp;
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__asm__ volatile(
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"mv sp, %0\n\t"
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"jr t0\n\t"
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:
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: "r"(sp), "r"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5), "r"(t0)
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: "memory");
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#else
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(void) state;
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__builtin_trap();

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