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8 | 8 | #include <fsp/util.h> |
9 | 9 | #include <hob_iiouds.h> |
10 | 10 | #include <hob_memmap.h> |
11 | | -#include <pc80/mc146818rtc.h> |
12 | 11 | #include <soc/ddr.h> |
13 | 12 | #include <soc/romstage.h> |
14 | 13 | #include <soc/pci_devs.h> |
15 | 14 | #include <soc/intel/common/smbios.h> |
16 | | -#include <stdbool.h> |
| 15 | +#include <soc/soc_util.h> |
17 | 16 | #include <string.h> |
18 | 17 |
|
19 | 18 | #include "chip.h" |
20 | 19 |
|
21 | | -/* |
22 | | - * Address of the MRC status byte in CMOS. Should be reserved |
23 | | - * in mainboards' cmos.layout and not covered by checksum. |
24 | | - */ |
25 | | -#define CMOS_OFFSET_MRC_STATUS 0x47 |
26 | | - |
27 | | -#if CONFIG(USE_OPTION_TABLE) |
28 | | -#include "option_table.h" |
29 | | -#if CMOS_VSTART_mrc_status != CMOS_OFFSET_MRC_STATUS * 8 |
30 | | -#error "CMOS start for CPX-SP MRC status byte is not correct, check your cmos.layout" |
31 | | -#endif |
32 | | -#if CMOS_VLEN_mrc_status != 8 |
33 | | -#error "CMOS length for CPX-SP MRC status byte is not correct, check your cmos.layout" |
34 | | -#endif |
35 | | -#endif |
36 | | - |
37 | 20 | void __weak mainboard_memory_init_params(FSPM_UPD *mupd) |
38 | 21 | { |
39 | 22 | /* Default weak implementation */ |
40 | 23 | } |
41 | 24 |
|
42 | | -static const struct SystemMemoryMapHob *get_system_memory_map(void) |
43 | | -{ |
44 | | - size_t hob_size; |
45 | | - const uint8_t mem_hob_guid[16] = FSP_SYSTEM_MEMORYMAP_HOB_GUID; |
46 | | - const struct SystemMemoryMapHob **memmap_addr; |
47 | | - |
48 | | - memmap_addr = (const struct SystemMemoryMapHob **) |
49 | | - fsp_find_extension_hob_by_guid(mem_hob_guid, &hob_size); |
50 | | - /* hob_size is the size of the 8-byte address not the hob data */ |
51 | | - assert(memmap_addr && hob_size != 0); |
52 | | - /* assert the pointer to the hob is not NULL */ |
53 | | - assert(*memmap_addr); |
54 | | - |
55 | | - return *memmap_addr; |
56 | | -} |
57 | | - |
58 | 25 | static uint8_t get_error_correction_type(const uint8_t RasModesEnabled) |
59 | 26 | { |
60 | 27 | switch (RasModesEnabled) { |
@@ -155,16 +122,6 @@ void save_dimm_info(void) |
155 | 122 | printk(BIOS_DEBUG, "%d out of %d DIMMs found\n", num_dimms, mem_info->dimm_cnt); |
156 | 123 | } |
157 | 124 |
|
158 | | -static void set_cmos_mrc_cold_boot_flag(bool cold_boot_required) |
159 | | -{ |
160 | | - uint8_t mrc_status = cmos_read(CMOS_OFFSET_MRC_STATUS); |
161 | | - uint8_t new_mrc_status = (mrc_status & 0xfe) | cold_boot_required; |
162 | | - printk(BIOS_SPEW, "MRC status: 0x%02x want 0x%02x\n", mrc_status, new_mrc_status); |
163 | | - if (new_mrc_status != mrc_status) { |
164 | | - cmos_write(new_mrc_status, CMOS_OFFSET_MRC_STATUS); |
165 | | - } |
166 | | -} |
167 | | - |
168 | 125 | void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) |
169 | 126 | { |
170 | 127 | FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; |
@@ -233,5 +190,5 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) |
233 | 190 | mainboard_memory_init_params(mupd); |
234 | 191 |
|
235 | 192 | /* Adjust the "cold boot required" flag in CMOS. */ |
236 | | - set_cmos_mrc_cold_boot_flag(!mupd->FspmArchUpd.NvsBufferPtr); |
| 193 | + soc_set_mrc_cold_boot_flag(!mupd->FspmArchUpd.NvsBufferPtr); |
237 | 194 | } |
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