Skip to content

Commit a3b0137

Browse files
committed
mb/system76/adl-p: Remove CPU PCIe RP RTD3 config
This has caused nothing but issues trying to get different drives to behave correctly. Just remove it. Change-Id: I5ed36c519fa7757034172f146fb5e03a15f40ede Signed-off-by: Tim Crawford <tcrawford@system76.com>
1 parent 509a516 commit a3b0137

5 files changed

Lines changed: 0 additions & 46 deletions

File tree

src/mainboard/system76/adl-p/variants/darp8/overridetree.cb

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -22,12 +22,6 @@ chip soc/intel/alderlake
2222
.clk_req = 0,
2323
.flags = PCIE_RP_LTR,
2424
}"
25-
chip soc/intel/common/block/pcie/rtd3
26-
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD2_PWR_EN
27-
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_CPU_SSD2_RST#
28-
register "srcclk_pin" = "0" # SSD2_CLKREQ#
29-
device generic 0 on end
30-
end
3125
end
3226
device ref tcss_xhci on
3327
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"

src/mainboard/system76/adl-p/variants/galp6/overridetree.cb

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,12 +20,6 @@ chip soc/intel/alderlake
2020
.clk_req = 0,
2121
.flags = PCIE_RP_LTR,
2222
}"
23-
chip soc/intel/common/block/pcie/rtd3
24-
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD1_PWR_EN
25-
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_SSD1_RST#
26-
register "srcclk_pin" = "0" # SSD1_CLKREQ#
27-
device generic 0 on end
28-
end
2923
end
3024
device ref tcss_xhci on
3125
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"

src/mainboard/system76/adl-p/variants/lemp11/overridetree.cb

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,12 +20,6 @@ chip soc/intel/alderlake
2020
.clk_req = 0,
2121
.flags = PCIE_RP_LTR,
2222
}"
23-
chip soc/intel/common/block/pcie/rtd3
24-
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD2_PWR_EN
25-
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_CPU_SSD2_RST#
26-
register "srcclk_pin" = "0" # SSD0_CLKREQ#
27-
device generic 0 on end
28-
end
2923
end
3024
device ref tcss_xhci on
3125
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"

src/mainboard/system76/adl-p/variants/oryp10/overridetree.cb

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -41,13 +41,6 @@ chip soc/intel/alderlake
4141
.clk_req = 0,
4242
.flags = PCIE_RP_LTR,
4343
}"
44-
# FIXME: WD drives fail to suspend
45-
#chip soc/intel/common/block/pcie/rtd3
46-
# register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # M2_PWR_EN1
47-
# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST#
48-
# register "srcclk_pin" = "0" # SSD0_CLKREQ#
49-
# device generic 0 on end
50-
#end
5144
end
5245
device ref pcie4_1 on
5346
# CPU PCIe RP#3 x4, Clock 4 (SSD2)
@@ -56,13 +49,6 @@ chip soc/intel/alderlake
5649
.clk_req = 4,
5750
.flags = PCIE_RP_LTR,
5851
}"
59-
# FIXME: WD drives fail to suspend
60-
#chip soc/intel/common/block/pcie/rtd3
61-
# register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C2)" # M2_PWR_EN2
62-
# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST#
63-
# register "srcclk_pin" = "4" # SSD1_CLKREQ#
64-
# device generic 0 on end
65-
#end
6652
end
6753
device ref tcss_xhci on
6854
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"

src/mainboard/system76/adl-p/variants/oryp9/overridetree.cb

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -41,13 +41,6 @@ chip soc/intel/alderlake
4141
.clk_req = 0,
4242
.flags = PCIE_RP_LTR,
4343
}"
44-
# FIXME: WD drives fail to suspend
45-
#chip soc/intel/common/block/pcie/rtd3
46-
# register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # M2_PWR_EN1
47-
# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST#
48-
# register "srcclk_pin" = "0" # SSD0_CLKREQ#
49-
# device generic 0 on end
50-
#end
5144
end
5245
device ref pcie4_1 on
5346
# CPU PCIe RP#3 x4, Clock 4 (SSD2)
@@ -56,13 +49,6 @@ chip soc/intel/alderlake
5649
.clk_req = 4,
5750
.flags = PCIE_RP_LTR,
5851
}"
59-
# FIXME: WD drives fail to suspend
60-
#chip soc/intel/common/block/pcie/rtd3
61-
# register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C2)" # M2_PWR_EN2
62-
# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST#
63-
# register "srcclk_pin" = "4" # SSD1_CLKREQ#
64-
# device generic 0 on end
65-
#end
6652
end
6753
device ref tcss_xhci on
6854
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"

0 commit comments

Comments
 (0)