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AdityaGarg8AdityaGarg8
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‎patches/0001-thunderbolt-add-device-links-for-integrated-Apple-T2-NHI.patch‎

Lines changed: 160 additions & 0 deletions
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From c9a88b70e1157e75b7de963bf7d2144c127a5037 Mon Sep 17 00:00:00 2001
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From: deqrocks <andre@negmaster.com>
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Date: Sun, 5 Apr 2026 13:36:54 +0200
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Subject: [PATCH] thunderbolt: add device links for integrated Apple T2 NHI
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---
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drivers/thunderbolt/tb.c | 115 +++++++++++++++++++++++++++------------
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1 file changed, 80 insertions(+), 35 deletions(-)
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diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c
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index 4f5f1dfc0..1b4ff0d9e 100644
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--- a/drivers/thunderbolt/tb.c
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+++ b/drivers/thunderbolt/tb.c
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@@ -9,6 +9,7 @@
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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+#include <linux/acpi.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_data/x86/apple.h>
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@@ -3305,21 +3306,12 @@ static const struct tb_cm_ops tb_cm_ops = {
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static bool tb_apple_add_links(struct tb_nhi *nhi)
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{
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struct pci_dev *upstream, *pdev;
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+ struct acpi_device *adev;
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bool ret;
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if (!x86_apple_machine)
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return false;
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32+
- switch (nhi->pdev->device) {
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- case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE:
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- case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
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- case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI:
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- case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI:
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- break;
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- default:
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- return false;
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- }
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-
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upstream = pci_upstream_bridge(nhi->pdev);
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while (upstream) {
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if (!pci_is_pcie(upstream))
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@@ -3329,34 +3321,87 @@ static bool tb_apple_add_links(struct tb_nhi *nhi)
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upstream = pci_upstream_bridge(upstream);
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}
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- if (!upstream)
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- return false;
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-
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- /*
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- * For each hotplug downstream port, create add device link
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- * back to NHI so that PCIe tunnels can be re-established after
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- * sleep.
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- */
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ret = false;
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- for_each_pci_bridge(pdev, upstream->subordinate) {
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- const struct device_link *link;
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- if (!pci_is_pcie(pdev))
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- continue;
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- if (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM ||
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- !pdev->is_pciehp)
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- continue;
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+ if (upstream) {
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+ /*
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+ * Discrete Thunderbolt controller (e.g. Light Ridge, Falcon
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+ * Ridge) behind a PCIe switch. Create device links for each
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+ * hotplug-capable downstream port under that switch.
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+ */
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+ for_each_pci_bridge(pdev, upstream->subordinate) {
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+ const struct device_link *link;
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- link = device_link_add(&pdev->dev, &nhi->pdev->dev,
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- DL_FLAG_AUTOREMOVE_SUPPLIER |
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- DL_FLAG_PM_RUNTIME);
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- if (link) {
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- dev_dbg(&nhi->pdev->dev, "created link from %s\n",
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- dev_name(&pdev->dev));
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- ret = true;
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- } else {
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- dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n",
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- dev_name(&pdev->dev));
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+ if (!pci_is_pcie(pdev))
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+ continue;
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+ if (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM ||
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+ !pdev->is_pciehp)
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+ continue;
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+
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+ link = device_link_add(&pdev->dev, &nhi->pdev->dev,
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+ DL_FLAG_AUTOREMOVE_SUPPLIER |
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+ DL_FLAG_PM_RUNTIME);
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+ if (link) {
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+ dev_dbg(&nhi->pdev->dev, "created link from %s\n",
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+ dev_name(&pdev->dev));
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+ ret = true;
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+ } else {
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+ dev_warn(&nhi->pdev->dev,
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+ "device link creation from %s failed\n",
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+ dev_name(&pdev->dev));
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+ }
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+ }
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+ } else {
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+ unsigned int slot, func;
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+
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+ /*
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+ * Integrated Thunderbolt NHI on T2 Macs (2018-2020). The
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+ * NHI and its associated PCIe root ports all sit directly
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+ * on the root complex with no upstream port. Apple's ACPI
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+ * tables name Thunderbolt root ports as TRP0, TRP1, etc.
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+ * Find them and create device links back to the NHI so
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+ * that PCIe tunnels can be re-established after sleep.
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+ */
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+ for (slot = 0; slot < 32; slot++) {
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+ for (func = 0; func < 8; func++) {
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+ const struct device_link *link;
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+ const char *bid;
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+
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+ pdev = pci_get_slot(nhi->pdev->bus,
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+ PCI_DEVFN(slot, func));
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+ if (!pdev)
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+ continue;
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+
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+ if (!pci_is_pcie(pdev))
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+ goto put_pdev;
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+ if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT)
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+ goto put_pdev;
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+
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+ adev = ACPI_COMPANION(&pdev->dev);
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+ if (!adev)
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+ goto put_pdev;
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+
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+ bid = acpi_device_bid(adev);
135+
+ if (!bid || strncmp(bid, "TRP", 3) != 0)
136+
+ goto put_pdev;
137+
+
138+
+ link = device_link_add(&pdev->dev, &nhi->pdev->dev,
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+ DL_FLAG_AUTOREMOVE_SUPPLIER |
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+ DL_FLAG_PM_RUNTIME);
141+
+ if (link) {
142+
+ dev_dbg(&nhi->pdev->dev,
143+
+ "created link from %s\n",
144+
+ dev_name(&pdev->dev));
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+ ret = true;
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+ } else {
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+ dev_warn(&nhi->pdev->dev,
148+
+ "device link creation from %s failed\n",
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+ dev_name(&pdev->dev));
150+
+ }
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+
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+put_pdev:
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+ pci_dev_put(pdev);
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+ }
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}
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}
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--
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2.53.0
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‎patches/0002-PCI-portdrv-use-INTx-for-Apple-T2-Thunderbolt-root-port-services.patch‎

Lines changed: 73 additions & 0 deletions
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@@ -0,0 +1,73 @@
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From a388d392de31c53aacfcb8b375d1127046f42edd Mon Sep 17 00:00:00 2001
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From: deqrocks <andre@negmaster.com>
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Date: Mon, 6 Apr 2026 11:23:57 +0200
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Subject: [PATCH] PCI/portdrv: use INTx for Apple T2 Thunderbolt root port
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services
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---
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drivers/pci/pcie/portdrv.c | 31 +++++++++++++++++++++++++++++++
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1 file changed, 31 insertions(+)
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11+
diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
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index a0991da48..a2fc6c99f 100644
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--- a/drivers/pci/pcie/portdrv.c
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+++ b/drivers/pci/pcie/portdrv.c
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@@ -7,6 +7,7 @@
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*/
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#include <linux/bitfield.h>
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+#include <linux/acpi.h>
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#include <linux/dmi.h>
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#include <linux/init.h>
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#include <linux/module.h>
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@@ -18,10 +19,37 @@
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/aer.h>
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+#include <linux/platform_data/x86/apple.h>
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#include "../pci.h"
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#include "portdrv.h"
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32+
+static bool pcie_port_no_msi_on_apple_t2(struct pci_dev *dev)
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+{
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+ acpi_handle handle;
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+ struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
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+ char *name;
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+ bool ret = false;
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+
39+
+ if (!x86_apple_machine)
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+ return false;
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+ if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
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+ return false;
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+
44+
+ handle = ACPI_HANDLE(&dev->dev);
45+
+ if (!handle)
46+
+ return false;
47+
+
48+
+ if (ACPI_SUCCESS(acpi_get_name(handle, ACPI_SINGLE_NAME, &buf))) {
49+
+ name = buf.pointer;
50+
+ if (name)
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+ ret = !strncmp(name, "TRP", 3);
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+ }
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+
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+ ACPI_FREE(buf.pointer);
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+ return ret;
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+}
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+
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/*
59+
* The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
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* be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
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@@ -181,6 +209,9 @@ static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
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for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
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irqs[i] = -1;
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65+
+ if (pcie_port_no_msi_on_apple_t2(dev))
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+ goto intx_irq;
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+
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/*
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* If we support PME but can't use MSI/MSI-X for it, we have to
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* fall back to INTx or other interrupts, e.g., a system shared
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--
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2.53.0
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