WIP ESP32C5 support

tannewt · tannewt · commit 9e904e26422e · 2025-08-15T12:08:21.000-07:00
diff --git a/lib/protomatter b/lib/protomatter
@@ -1 +1 @@
-Subproject commit 3045bbb2d54732ef96076e9a8f09a5073deb2c4c
+Subproject commit dbd84325c710e6beb28c7c3407de190dcd3b51c0
diff --git a/lib/tinyusb b/lib/tinyusb
@@ -1 +1 @@
-Subproject commit 5fb3c09963bca362e535788e289d4b3518da5973
+Subproject commit ddb8f0fe73fd733b0fd97462b14825dcb6039949
diff --git a/ports/espressif/Makefile b/ports/espressif/Makefile
@@ -197,7 +197,9 @@ CFLAGS += $(OPTIMIZATION_FLAGS)
 CFLAGS += $(INC) -Werror -Wall -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) -Werror=missing-prototypes -Werror=old-style-definition
 
 # Most current ESPs have nano versions of newlib in ROM so we use them.
-ifneq ($(IDF_TARGET),esp32c6)
+ifeq ($(IDF_TARGET),esp32c5)
+	LDFLAGS += -T$(IDF_TARGET).rom.newlib.ld
+else ifneq ($(IDF_TARGET),esp32c6)
 	CFLAGS += --specs=nano.specs
 	LDFLAGS += -T$(IDF_TARGET).rom.newlib-nano.ld
 else
@@ -278,6 +280,20 @@ LDFLAGS += \
 CHIP_COMPONENTS = \
 	esp_driver_tsens
 
+else ifeq ($(IDF_TARGET),esp32c5)
+LDFLAGS += \
+	-Tesp32c5.rom.phy.ld \
+	-Tesp32c5.rom.pp.ld \
+	-Tesp32c5.rom.net80211.ld \
+	-Tesp32c5.rom.coexist.ld \
+	-Tesp32c5.rom.heap.ld \
+	-Tesp32c5.rom.systimer.ld \
+	-Tesp32c5.rom.wdt.ld \
+	-Tesp32c5.rom.version.ld
+
+CHIP_COMPONENTS = \
+	esp_driver_tsens
+
 else ifeq ($(IDF_TARGET),esp32c6)
 LDFLAGS += \
 	-Tesp32c6.rom.phy.ld \
@@ -352,6 +368,8 @@ else ifeq ($(IDF_TARGET),esp32c2)
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C2
 else ifeq ($(IDF_TARGET),esp32c3)
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C3
+else ifeq ($(IDF_TARGET),esp32c5)
+CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C5
 else ifeq ($(IDF_TARGET),esp32c6)
 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32C6
 else ifeq ($(IDF_TARGET),esp32p4)
@@ -685,6 +703,7 @@ ifneq ($(CIRCUITPY_BLEIO_NATIVE),0)
 	BLE_IMPL_esp32s3 := esp32c3
 	BLE_IMPL_esp32c2 := libble
 	BLE_IMPL_esp32c3 := esp32c3
+	BLE_IMPL_esp32c5 := libble
 	BLE_IMPL_esp32c6 := libble
 	BLE_IMPL_esp32h2 := libble
 	BLE_IMPL = $(BLE_IMPL_$(IDF_TARGET))
@@ -767,10 +786,14 @@ ifeq ($(IDF_TARGET),esp32)
 BOOTLOADER_OFFSET = 0x1000
 else ifeq ($(IDF_TARGET),esp32h2)
 BOOTLOADER_OFFSET = 0x0
+else ifeq ($(IDF_TARGET),esp32h4)
+BOOTLOADER_OFFSET = 0x2000
 else ifeq ($(IDF_TARGET),esp32c2)
 BOOTLOADER_OFFSET = 0x0
 else ifeq ($(IDF_TARGET),esp32c3)
 BOOTLOADER_OFFSET = 0x0
+else ifeq ($(IDF_TARGET),esp32c5)
+BOOTLOADER_OFFSET = 0x2000
 else ifeq ($(IDF_TARGET),esp32c6)
 BOOTLOADER_OFFSET = 0x0
 else ifeq ($(IDF_TARGET),esp32p4)
diff --git a/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/board.c b/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/board.c
@@ -0,0 +1,19 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2025 Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#include "supervisor/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+    // Debug UART
+    #ifdef DEBUG
+    common_hal_never_reset_pin(&pin_GPIO11);
+    common_hal_never_reset_pin(&pin_GPIO12);
+    #endif
+}
+
+// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
diff --git a/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/mpconfigboard.h b/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/mpconfigboard.h
@@ -0,0 +1,17 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2025 Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#pragma once
+
+// Micropython setup
+
+#define MICROPY_HW_BOARD_NAME       "ESP32-C5-DevKitC-1-N8R4"
+#define MICROPY_HW_MCU_NAME         "ESP32C5"
+
+#define MICROPY_HW_LED_STATUS       (&pin_GPIO27)
+
+#define DEFAULT_UART_BUS_RX         (&pin_GPIO12)
+#define DEFAULT_UART_BUS_TX         (&pin_GPIO11)
diff --git a/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/mpconfigboard.mk b/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/mpconfigboard.mk
@@ -0,0 +1,12 @@
+CIRCUITPY_CREATOR_ID = 0x000C303A
+CIRCUITPY_CREATION_ID = 0x00C50002
+
+IDF_TARGET = esp32c5
+
+CIRCUITPY_ESP_FLASH_MODE = qio
+CIRCUITPY_ESP_FLASH_FREQ = 80m
+CIRCUITPY_ESP_FLASH_SIZE = 8MB
+
+CIRCUITPY_ESP_PSRAM_SIZE = 4MB
+CIRCUITPY_ESP_PSRAM_MODE = qio
+CIRCUITPY_ESP_PSRAM_FREQ = 80m
diff --git a/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/pins.c b/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/pins.c
@@ -0,0 +1,43 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2025 Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#include "shared-bindings/board/__init__.h"
+
+static const mp_rom_map_elem_t board_module_globals_table[] = {
+    CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
+
+    { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO23), MP_ROM_PTR(&pin_GPIO23) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO24), MP_ROM_PTR(&pin_GPIO24) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO25), MP_ROM_PTR(&pin_GPIO25) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO28), MP_ROM_PTR(&pin_GPIO28) },
+
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO12) },
+
+    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO27) },
+
+    { MP_ROM_QSTR(MP_QSTR_USB_DM), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_USB_DP), MP_ROM_PTR(&pin_GPIO14) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/sdkconfig b/ports/espressif/boards/espressif_esp32c5_devkitc_1_n8r4/sdkconfig
diff --git a/ports/espressif/common-hal/alarm/pin/PinAlarm.c b/ports/espressif/common-hal/alarm/pin/PinAlarm.c
@@ -384,7 +384,9 @@ void alarm_pin_pinalarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_ob
             pull_mode = GPIO_PULLUP_ONLY;
         }
         gpio_set_direction(i, GPIO_MODE_DEF_INPUT);
+        #ifdef GPIO_PIN_MUX_REG
         PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[i], PIN_FUNC_GPIO);
+        #endif
         if (pull) {
             gpio_set_pull_mode(i, pull_mode);
         }
diff --git a/ports/espressif/common-hal/analogbufio/BufferedIn.c b/ports/espressif/common-hal/analogbufio/BufferedIn.c
@@ -33,7 +33,7 @@
 #elif defined(CONFIG_IDF_TARGET_ESP32S2)
 #define ADC_RESULT_BYTE     2
 #define ADC_CONV_LIMIT_EN   0
-#elif defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#elif defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
 #define ADC_RESULT_BYTE     4
 #define ADC_CONV_LIMIT_EN   0
 #elif defined(CONFIG_IDF_TARGET_ESP32S3)
diff --git a/ports/espressif/common-hal/analogio/AnalogIn.c b/ports/espressif/common-hal/analogio/AnalogIn.c
@@ -30,6 +30,8 @@
 #define DATA_WIDTH          ADC_BITWIDTH_12
 #elif defined(CONFIG_IDF_TARGET_ESP32C3)
 #define DATA_WIDTH          ADC_BITWIDTH_12
+#elif defined(CONFIG_IDF_TARGET_ESP32C5)
+#define DATA_WIDTH          ADC_BITWIDTH_12
 #elif defined(CONFIG_IDF_TARGET_ESP32C6)
 #define DATA_WIDTH          ADC_BITWIDTH_12
 #elif defined(CONFIG_IDF_TARGET_ESP32P4)
diff --git a/ports/espressif/common-hal/digitalio/DigitalInOut.c b/ports/espressif/common-hal/digitalio/DigitalInOut.c
@@ -11,8 +11,12 @@
 #include "hal/gpio_hal.h"
 
 static bool _pin_is_input(uint8_t pin_number) {
+    #ifdef CONFIG_IDF_TARGET_ESP32C5
+    return IO_MUX.gpio[pin_number].fun_ie;
+    #else
     const uint32_t iomux = READ_PERI_REG(GPIO_PIN_MUX_REG[pin_number]);
     return (iomux & FUN_IE) != 0;
+    #endif
 }
 
 void digitalio_digitalinout_preserve_for_deep_sleep(size_t n_dios, digitalio_digitalinout_obj_t *preserve_dios[]) {
@@ -135,10 +139,18 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull(
 digitalio_pull_t common_hal_digitalio_digitalinout_get_pull(
     digitalio_digitalinout_obj_t *self) {
     gpio_num_t gpio_num = self->pin->number;
+    #ifdef CONFIG_IDF_TARGET_ESP32C5
+    if (IO_MUX.gpio[gpio_num].fun_wpu) {
+        return PULL_UP;
+    } else if (IO_MUX.gpio[gpio_num].fun_wpd) {
+        return PULL_DOWN;
+    }
+    #else
     if (REG_GET_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PU)) {
         return PULL_UP;
     } else if (REG_GET_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PD)) {
         return PULL_DOWN;
     }
+    #endif
     return PULL_NONE;
 }
diff --git a/ports/espressif/common-hal/espidf/__init__.c b/ports/espressif/common-hal/espidf/__init__.c
@@ -30,6 +30,9 @@ static size_t psram_size_usable(void) {
     #ifdef CONFIG_IDF_TARGET_ESP32P4
     size_t s = esp_psram_get_size();
     #else
+    #ifndef SOC_EXTRAM_DATA_SIZE
+    #define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW)
+    #endif
     size_t s = MIN(esp_psram_get_size(), SOC_EXTRAM_DATA_SIZE);
     #endif
     return s - esp_himem_reserved_area_size();
diff --git a/ports/espressif/common-hal/microcontroller/Pin.c b/ports/espressif/common-hal/microcontroller/Pin.c
@@ -126,6 +126,29 @@ static const uint64_t pin_mask_reset_forbidden =
     #endif
     #endif // ESP32C3
 
+    #if defined(CONFIG_IDF_TARGET_ESP32C5)
+    // Never ever reset pins used to communicate with SPI flash.
+    #if defined(CONFIG_SPIRAM_BOOT_HW_INIT)
+    GPIO_SEL_15 |         // SPICS1
+    #endif
+    GPIO_SEL_16 |         // SPICS0
+    GPIO_SEL_17 |         // SPIQ
+    GPIO_SEL_18 |         // SPIWP
+    GPIO_SEL_20 |         // SPIHD
+    GPIO_SEL_21 |         // SPICLK
+    GPIO_SEL_22 |         // SPID
+    #if CIRCUITPY_ESP_USB_SERIAL_JTAG
+    // Never ever reset serial/JTAG communication pins.
+    GPIO_SEL_13 |         // USB D-
+    GPIO_SEL_14 |         // USB D+
+    #endif
+    #if defined(CONFIG_ESP_CONSOLE_UART_DEFAULT) && CONFIG_ESP_CONSOLE_UART_DEFAULT && CONFIG_ESP_CONSOLE_UART_NUM == 0
+    // Never reset debug UART/console pins.
+    GPIO_SEL_11 |
+    GPIO_SEL_12 |
+    #endif
+    #endif // ESP32C6
+
     #if defined(CONFIG_IDF_TARGET_ESP32C6)
     // Never ever reset pins used to communicate with SPI flash.
     GPIO_SEL_24 |         // SPICS0
@@ -371,9 +394,13 @@ void reset_all_pins(void) {
     #endif
 
     for (uint8_t i = 0; i < GPIO_PIN_COUNT; i++) {
+        #ifdef GPIO_PIN_MUX_REG
         uint32_t iomux_address = GPIO_PIN_MUX_REG[i];
-        if (iomux_address == 0 ||
-            _never_reset(i) ||
+        if (iomux_address == 0) {
+            continue;
+        }
+        #endif
+        if (_never_reset(i) ||
             _skip_reset_once(i) ||
             _preserved_pin(i)) {
             continue;
diff --git a/ports/espressif/common-hal/microcontroller/Processor.c b/ports/espressif/common-hal/microcontroller/Processor.c
@@ -126,6 +126,8 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
     uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SYS_0_REG);
     #elif defined(CONFIG_IDF_TARGET_ESP32C2)
     uint32_t mac_address_part = REG_READ(EFUSE_RD_BLK2_DATA0_REG);
+    #elif defined(EFUSE_RD_MAC_SYS0_REG)
+    uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SYS0_REG);
     #else
     uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_0_REG);
     #endif
@@ -145,6 +147,8 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
     mac_address_part = REG_READ(EFUSE_RD_MAC_SYS_1_REG);
     #elif defined(CONFIG_IDF_TARGET_ESP32C2)
     mac_address_part = REG_READ(EFUSE_RD_BLK2_DATA1_REG);
+    #elif defined(EFUSE_RD_MAC_SYS1_REG)
+    mac_address_part = REG_READ(EFUSE_RD_MAC_SYS1_REG);
     #else
     mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_1_REG);
     #endif
diff --git a/ports/espressif/common-hal/microcontroller/__init__.c b/ports/espressif/common-hal/microcontroller/__init__.c
@@ -33,6 +33,9 @@
 #elif defined(CONFIG_IDF_TARGET_ESP32C3)
 #include "soc/rtc_cntl_reg.h"
 #include "esp32c3/rom/rtc.h"
+#elif defined(CONFIG_IDF_TARGET_ESP32C5)
+#include "soc/lp_aon_reg.h"
+#include "esp32c5/rom/rtc.h"
 #elif defined(CONFIG_IDF_TARGET_ESP32C6)
 #include "soc/lp_aon_reg.h"
 #include "esp32c6/rom/rtc.h"
diff --git a/ports/espressif/esp-idf-config/partitions-8MB-no-uf2.csv b/ports/espressif/esp-idf-config/partitions-8MB-no-uf2.csv
@@ -3,6 +3,5 @@
 # partition_table,  data,   table,      0x8000,     4K
 nvs,                data,   nvs,        0x9000,     20K
 otadata,            data,   ota,        0xe000,     8K
-ota_0,              app,    ota_0,      0x10000,    2048K
-ota_1,              app,    ota_1,      0x210000,   2048K
+ota_0,              app,    ota_0,      0x10000,    4096K
 user_fs,            data,   fat,        0x410000,   4032K
diff --git a/ports/espressif/esp-idf-config/sdkconfig-esp32c5.defaults b/ports/espressif/esp-idf-config/sdkconfig-esp32c5.defaults
@@ -0,0 +1,54 @@
+#
+# Espressif IoT Development Framework Configuration
+#
+#
+# Component config
+#
+#
+# Bluetooth
+#
+CONFIG_BT_ENABLED=y
+CONFIG_BT_NIMBLE_ENABLED=y
+#
+# NimBLE Options
+#
+CONFIG_BT_NIMBLE_LOG_LEVEL_NONE=y
+CONFIG_BT_NIMBLE_NVS_PERSIST=y
+#
+# Memory Settings
+#
+CONFIG_BT_NIMBLE_TRANSPORT_ACL_FROM_LL_COUNT=20
+CONFIG_BT_NIMBLE_TRANSPORT_EVT_SIZE=70
+# end of Memory Settings
+
+CONFIG_BT_NIMBLE_EXT_ADV=y
+# end of NimBLE Options
+
+# end of Bluetooth
+
+#
+# Driver Configurations
+#
+#
+# PCNT Configuration
+#
+CONFIG_PCNT_CTRL_FUNC_IN_IRAM=y
+# end of PCNT Configuration
+
+# end of Driver Configurations
+
+#
+# PHY
+#
+CONFIG_ESP_PHY_ENABLE_USB=y
+# end of PHY
+
+#
+# Wi-Fi
+#
+CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM=4
+# end of Wi-Fi
+
+# end of Component config
+
+# end of Espressif IoT Development Framework Configuration
diff --git a/ports/espressif/mpconfigport.mk b/ports/espressif/mpconfigport.mk
diff --git a/ports/espressif/peripherals/esp32c5/pins.c b/ports/espressif/peripherals/esp32c5/pins.c
diff --git a/ports/espressif/peripherals/esp32c5/pins.h b/ports/espressif/peripherals/esp32c5/pins.h
diff --git a/ports/espressif/peripherals/pins.h b/ports/espressif/peripherals/pins.h
diff --git a/ports/espressif/supervisor/port.c b/ports/espressif/supervisor/port.c
diff --git a/ports/espressif/tools/build_memory_info.py b/ports/espressif/tools/build_memory_info.py

Original file line number	Diff line number	Diff line change
`@@ -384,7 +384,9 @@ void alarm_pin_pinalarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_ob`
`384`	`384`	`pull_mode = GPIO_PULLUP_ONLY;`
`385`	`385`	`}`
`386`	`386`	`gpio_set_direction(i, GPIO_MODE_DEF_INPUT);`
	`387`	`+ #ifdef GPIO_PIN_MUX_REG`
`387`	`388`	`PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[i], PIN_FUNC_GPIO);`
	`389`	`+ #endif`
`388`	`390`	`if (pull) {`
`389`	`391`	`gpio_set_pull_mode(i, pull_mode);`
`390`	`392`	`}`