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tannewttannewt
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Add P4X EV Function board def
This includes fixes to the Makefile to support the v3 P4.
1 parent 79b2f8c commit d293209

6 files changed

Lines changed: 256 additions & 6 deletions

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‎ports/espressif/Makefile‎

Lines changed: 47 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -209,6 +209,7 @@ REGISTRATION_FUNCTIONS = \
209209
-u vfs_include_syscalls_impl \
210210
-u esp_vfs_include_nullfs_register \
211211
-u usb_serial_jtag_vfs_include_dev_init \
212+
-u usb_serial_jtag_connection_monitor_include \
212213
-u esp_flash_spi_init_include_func \
213214
-u pthread_include_pthread_impl \
214215
-u pthread_include_pthread_cond_var_impl \
@@ -218,6 +219,39 @@ REGISTRATION_FUNCTIONS = \
218219
-u esp_security_init_include_impl \
219220
-u mbedtls_psa_crypto_init_include_impl
220221

222+
# RISC-V picolibc ships optimized memcpy/memset/etc. that need forcing
223+
# (gated by CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS in IDF's esp_libc CMake).
224+
ifeq ($(IDF_TARGET_ARCH),riscv)
225+
REGISTRATION_FUNCTIONS += \
226+
-u esp_libc_include_memcpy_impl \
227+
-u esp_libc_include_memmove_impl \
228+
-u esp_libc_include_memcmp_impl \
229+
-u esp_libc_include_memset_impl \
230+
-u esp_libc_include_strcpy_impl \
231+
-u esp_libc_include_strncpy_impl \
232+
-u esp_libc_include_strcmp_impl \
233+
-u esp_libc_include_strncmp_impl
234+
endif
235+
236+
# Chips with PAU + TOP power-down (SOC_PAU_SUPPORTED && SOC_PM_SUPPORT_TOP_PD):
237+
# C5, C6, C61, H2, H21, H4, P4. These pull in sleep_gpio + system-peripheral
238+
# retention, and the SW-driven RISC-V CPU register save/restore path.
239+
ifneq ($(filter $(IDF_TARGET),esp32c5 esp32c6 esp32c61 esp32h2 esp32h21 esp32h4 esp32p4),)
240+
REGISTRATION_FUNCTIONS += \
241+
-u esp_sleep_gpio_include \
242+
-u sleep_system_peripheral_dummy \
243+
-u rv_core_critical_regs_save \
244+
-u rv_core_critical_regs_restore
245+
endif
246+
247+
# RISC-V chips with a hardware FPU (H4, P4) need FPU register save/restore
248+
# alongside the CPU retention path.
249+
ifneq ($(filter $(IDF_TARGET),esp32h4 esp32p4),)
250+
REGISTRATION_FUNCTIONS += \
251+
-u rv_core_fpu_save \
252+
-u rv_core_fpu_restore
253+
endif
254+
221255

222256
#Debugging/Optimization
223257
ifeq ($(DEBUG), 1)
@@ -245,6 +279,14 @@ endif
245279
# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
246280
CFLAGS += $(OPTIMIZATION_FLAGS)
247281

282+
# Default ROM symbol maps; per-chip blocks below may override.
283+
IDF_TARGET_ROM_LD ?= $(IDF_TARGET).rom.ld
284+
# Floating-point/libgcc ROM map. IDF picks between libgcc and rvfp based on
285+
# CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB (rvfp xor libgcc, never both). Default
286+
# to libgcc; targets that ship the rvfp variant in ROM (P4 in particular)
287+
# override this.
288+
IDF_TARGET_ROM_FLOAT_LD ?= $(IDF_TARGET).rom.libgcc.ld
289+
248290
CFLAGS += $(INC) -Werror -Wall -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) -Werror=missing-prototypes -Werror=old-style-definition -Wno-error=cpp -Wno-cpp
249291

250292
# ESP-IDF v6.0 uses picolibc instead of newlib.
@@ -294,9 +336,9 @@ LDFLAGS += \
294336
-Tmemory.ld \
295337
-Tsections.ld \
296338
-T$(IDF_TARGET).peripherals.ld \
297-
-T$(IDF_TARGET).rom.ld \
339+
-T$(IDF_TARGET_ROM_LD) \
298340
-T$(IDF_TARGET).rom.api.ld \
299-
-T$(IDF_TARGET).rom.libgcc.ld \
341+
-T$(IDF_TARGET_ROM_FLOAT_LD) \
300342
-Wl,-Bstatic \
301343
-Wl,--no-warn-mismatch \
302344
-Wl,--build-id=none \
@@ -406,19 +448,18 @@ CFLAGS += \
406448
-isystem esp-idf/components/esp_driver_touch_sens/hw_ver3/include
407449

408450
ifeq ($(CIRCUITPY_ESP32P4_REV),3)
451+
IDF_TARGET_ROM_LD = esp32p4.rom.eco5.ld
452+
IDF_TARGET_ROM_FLOAT_LD = esp32p4.rom.eco5.rvfp.ld
409453
LDFLAGS += \
410-
-Tesp32p4.rom.libc.ld \
411454
-Tesp32p4.rom.systimer.ld \
412-
-Tesp32p4.rom.eco5.ld \
413455
-Tesp32p4.rom.eco5.libc.ld \
414-
-Tesp32p4.rom.eco5.rvfp.ld \
415456
-Tesp32p4.rom.version.ld \
416457
-Trom.wdt.ld
417458
else
459+
IDF_TARGET_ROM_FLOAT_LD = esp32p4.rom.rvfp.ld
418460
LDFLAGS += \
419461
-Tesp32p4.rom.libc.ld \
420462
-Tesp32p4.rom.systimer.ld \
421-
-Tesp32p4.rom.rvfp.ld \
422463
-Tesp32p4.rom.version.ld \
423464
-Trom.wdt.ld
424465
endif

‎ports/espressif/boards/espressif_esp32p4x_function_ev/board.c‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
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// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
4+
//
5+
// SPDX-License-Identifier: MIT
6+
7+
#include "supervisor/board.h"
8+
9+
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/espressif/boards/espressif_esp32p4x_function_ev/mpconfigboard.h‎

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@@ -0,0 +1,26 @@
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// This file is part of the CircuitPython project: https://circuitpython.org
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//
3+
// SPDX-FileCopyrightText: Copyright (c) 2025 Scott Shawcroft for Adafruit Industries
4+
//
5+
// SPDX-License-Identifier: MIT
6+
7+
#pragma once
8+
9+
// Micropython setup
10+
11+
#define MICROPY_HW_BOARD_NAME "ESP32-P4X-Function-EV"
12+
#define MICROPY_HW_MCU_NAME "ESP32P4"
13+
14+
#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
15+
16+
#define DEFAULT_UART_BUS_RX (&pin_GPIO38)
17+
#define DEFAULT_UART_BUS_TX (&pin_GPIO37)
18+
19+
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO8)
20+
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO7)
21+
22+
// Use the second USB device (numbered 0 and 1)
23+
#define CIRCUITPY_USB_DEVICE_INSTANCE 1
24+
#define CIRCUITPY_USB_DEVICE_HIGH_SPEED (1)
25+
26+
#define CIRCUITPY_USB_HOST_INSTANCE 0

‎ports/espressif/boards/espressif_esp32p4x_function_ev/mpconfigboard.mk‎

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@@ -0,0 +1,16 @@
1+
USB_VID = 0x303A
2+
USB_PID = 0x7014
3+
USB_PRODUCT = "ESP32-P4X-Function-EV"
4+
USB_MANUFACTURER = "Espressif"
5+
6+
IDF_TARGET = esp32p4
7+
8+
CIRCUITPY_ESP_FLASH_SIZE = 16MB
9+
CIRCUITPY_ESP_FLASH_MODE = qio
10+
CIRCUITPY_ESP_FLASH_FREQ = 80m
11+
12+
CIRCUITPY_ESP_PSRAM_SIZE = 32MB
13+
CIRCUITPY_ESP_PSRAM_MODE = hpi
14+
CIRCUITPY_ESP_PSRAM_FREQ = 200m
15+
16+
CIRCUITPY_ESP32P4_REV = 3

‎ports/espressif/boards/espressif_esp32p4x_function_ev/pins.c‎

Lines changed: 90 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,90 @@
1+
// This file is part of the CircuitPython project: https://circuitpython.org
2+
//
3+
// SPDX-FileCopyrightText: Copyright (c) 2025 Scott Shawcroft for Adafruit Industries
4+
//
5+
// SPDX-License-Identifier: MIT
6+
7+
#include "shared-bindings/board/__init__.h"
8+
9+
static const mp_rom_map_elem_t board_module_globals_table[] = {
10+
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
11+
12+
// Header Block J1
13+
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_GPIO7) },
14+
{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
15+
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{ MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_GPIO8) },
17+
{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
18+
19+
{ MP_ROM_QSTR(MP_QSTR_IO23), MP_ROM_PTR(&pin_GPIO23) },
20+
21+
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO37) },
22+
{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
23+
24+
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO38) },
25+
{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
26+
27+
{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
28+
{ MP_ROM_QSTR(MP_QSTR_IO22), MP_ROM_PTR(&pin_GPIO22) },
29+
{ MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
30+
31+
{ MP_ROM_QSTR(MP_QSTR_C6_WAKEUP), MP_ROM_PTR(&pin_GPIO6) },
32+
{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
33+
34+
{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
35+
{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
36+
{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
37+
{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
38+
{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
39+
40+
{ MP_ROM_QSTR(MP_QSTR_IO32), MP_ROM_PTR(&pin_GPIO32) },
41+
{ MP_ROM_QSTR(MP_QSTR_IO24), MP_ROM_PTR(&pin_GPIO24) },
42+
{ MP_ROM_QSTR(MP_QSTR_IO25), MP_ROM_PTR(&pin_GPIO25) },
43+
44+
{ MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
45+
{ MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
46+
47+
{ MP_ROM_QSTR(MP_QSTR_C6_EN), MP_ROM_PTR(&pin_GPIO54) },
48+
{ MP_ROM_QSTR(MP_QSTR_IO54), MP_ROM_PTR(&pin_GPIO54) },
49+
50+
{ MP_ROM_QSTR(MP_QSTR_IO48), MP_ROM_PTR(&pin_GPIO48) },
51+
52+
{ MP_ROM_QSTR(MP_QSTR_PA_CTRL), MP_ROM_PTR(&pin_GPIO53) },
53+
{ MP_ROM_QSTR(MP_QSTR_IO53), MP_ROM_PTR(&pin_GPIO53) },
54+
55+
{ MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
56+
{ MP_ROM_QSTR(MP_QSTR_IO47), MP_ROM_PTR(&pin_GPIO47) },
57+
{ MP_ROM_QSTR(MP_QSTR_IO27), MP_ROM_PTR(&pin_GPIO27) },
58+
59+
// I2S
60+
{ MP_ROM_QSTR(MP_QSTR_I2S_DSDIN), MP_ROM_PTR(&pin_GPIO9) },
61+
{ MP_ROM_QSTR(MP_QSTR_I2S_LRCK), MP_ROM_PTR(&pin_GPIO10) },
62+
{ MP_ROM_QSTR(MP_QSTR_I2S_ASDOUT), MP_ROM_PTR(&pin_GPIO11) },
63+
{ MP_ROM_QSTR(MP_QSTR_I2S_SCLK), MP_ROM_PTR(&pin_GPIO12) },
64+
{ MP_ROM_QSTR(MP_QSTR_I2S_MCLK), MP_ROM_PTR(&pin_GPIO13) },
65+
66+
// Ethernet
67+
{ MP_ROM_QSTR(MP_QSTR_RMII_RXDV), MP_ROM_PTR(&pin_GPIO28) },
68+
{ MP_ROM_QSTR(MP_QSTR_RMII_RXD0), MP_ROM_PTR(&pin_GPIO29) },
69+
{ MP_ROM_QSTR(MP_QSTR_RMII_RXD1), MP_ROM_PTR(&pin_GPIO30) },
70+
{ MP_ROM_QSTR(MP_QSTR_MDC), MP_ROM_PTR(&pin_GPIO31) },
71+
{ MP_ROM_QSTR(MP_QSTR_RMII_TXD0), MP_ROM_PTR(&pin_GPIO34) },
72+
{ MP_ROM_QSTR(MP_QSTR_RMII_TXD1), MP_ROM_PTR(&pin_GPIO35) },
73+
{ MP_ROM_QSTR(MP_QSTR_RMII_TXEN), MP_ROM_PTR(&pin_GPIO49) },
74+
{ MP_ROM_QSTR(MP_QSTR_RMII_CLK), MP_ROM_PTR(&pin_GPIO50) },
75+
{ MP_ROM_QSTR(MP_QSTR_PHY_RSTN), MP_ROM_PTR(&pin_GPIO51) },
76+
{ MP_ROM_QSTR(MP_QSTR_MDIO), MP_ROM_PTR(&pin_GPIO52) },
77+
78+
// SD Card
79+
{ MP_ROM_QSTR(MP_QSTR_SD_DATA0), MP_ROM_PTR(&pin_GPIO39) },
80+
{ MP_ROM_QSTR(MP_QSTR_SD_DATA1), MP_ROM_PTR(&pin_GPIO40) },
81+
{ MP_ROM_QSTR(MP_QSTR_SD_DATA2), MP_ROM_PTR(&pin_GPIO41) },
82+
{ MP_ROM_QSTR(MP_QSTR_SD_DATA3), MP_ROM_PTR(&pin_GPIO42) },
83+
{ MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO43) },
84+
{ MP_ROM_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO44) },
85+
{ MP_ROM_QSTR(MP_QSTR_SD_PWRN), MP_ROM_PTR(&pin_GPIO45) },
86+
87+
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
88+
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
89+
};
90+
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

‎ports/espressif/boards/espressif_esp32p4x_function_ev/sdkconfig‎

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#
2+
# Espressif IoT Development Framework Configuration
3+
#
4+
#
5+
# Bootloader config
6+
#
7+
#
8+
# Log
9+
#
10+
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
11+
# CONFIG_BOOTLOADER_LOG_LEVEL_INFO is not set
12+
# default:
13+
CONFIG_BOOTLOADER_LOG_LEVEL=2
14+
#
15+
# Format
16+
#
17+
# CONFIG_BOOTLOADER_LOG_COLORS is not set
18+
# end of Format
19+
20+
# end of Log
21+
22+
# end of Bootloader config
23+
24+
#
25+
# Component config
26+
#
27+
#
28+
# Bluetooth
29+
#
30+
# CONFIG_BT_ENABLED is not set
31+
# end of Bluetooth
32+
33+
#
34+
# Hardware Settings
35+
#
36+
#
37+
# Chip revision
38+
#
39+
# CONFIG_ESP32P4_REV_MIN_300 is not set
40+
CONFIG_ESP32P4_REV_MIN_301=y
41+
# default:
42+
CONFIG_ESP32P4_REV_MIN_FULL=301
43+
# default:
44+
CONFIG_ESP_REV_MIN_FULL=301
45+
# end of Chip revision
46+
47+
# default:
48+
CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND=y
49+
# default:
50+
CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE=0x100
51+
# end of Hardware Settings
52+
53+
#
54+
# ESP-STDIO
55+
#
56+
# CONFIG_ESP_CONSOLE_UART_DEFAULT is not set
57+
CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y
58+
# default:
59+
CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED=y
60+
# default:
61+
CONFIG_ESP_CONSOLE_UART_NUM=-1
62+
# default:
63+
CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=6
64+
# end of ESP-STDIO
65+
66+
# end of Component config
67+
68+
# end of Espressif IoT Development Framework Configuration

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