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zjit/src/backend/x86_64/mod.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1150,7 +1150,7 @@ impl Assembler {
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trace_compile_phase("regalloc", || {
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run_pass!(asm.number_instructions(0));
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let live_in = run_pass!(asm.analyze_liveness);
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let live_in = run_pass!(asm.analyze_liveness());
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let intervals = run_pass!(asm.build_intervals(live_in));
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// Dump live intervals if requested

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