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[WIP] Add local value numbering implementation in ZJIT#4

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[WIP] Add local value numbering implementation in ZJIT#4
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copilot/implement-local-value-numbering

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Implementation Plan for Local Value Numbering in ZJIT

Overview

Implement local value numbering (LVN) optimization to eliminate redundant computations within basic blocks. The Effect/AbstractHeap API already exists in the upstream codebase (zjit/src/hir_effect), so we'll use and potentially extend it as needed.

Implementation Checklist

  • Rebase on upstream ruby/ruby master
  • Explore existing Effect/AbstractHeap API
  • Implement local_value_numbering() optimization pass
    • Create InsnKey type for hashing instructions by operation and operands
    • Track pure expressions within each basic block using HashMap
    • Use Union-Find (make_equal_to) to deduplicate redundant computations
    • Leverage existing has_effects() method to identify pure operations
  • Add the pass to the optimize() pipeline
  • Create comprehensive tests for LVN
    • Test deduplication of pure arithmetic operations
    • Test preservation of side-effecting operations
    • Test interaction with constant folding and DCE
  • Run existing tests to ensure no regressions
  • Build and validate implementation

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tekknolagi and others added 2 commits August 26, 2025 09:10
Copilot AI requested a review from tekknolagi February 1, 2026 19:48
tekknolagi pushed a commit that referenced this pull request Mar 24, 2026
@tenderlove
ZJIT: Only load non-vreg opnds (ruby#16486)
7444096 
When we call `asm.load`, many times we're passing in a VReg, and that
causes extra loads when we lower to machine code.  I'd like to only emit
a load in the case that the operand _isn't_ a VReg.

For example this code:

```ruby
class Foo
  def initialize
    @foo = 123
  end

  def foo
    @foo
  end
end

foo = Foo.new
5.times { foo.foo }
```

Before this patch, the machine code for `LoadField` looks like this:

```
  # Insn: v18 LoadField v17, :_shape_id@0x4
  # Load field id=_shape_id offset=4
  0x121308320: mov x1, x0
  0x121308324: ldur w1, [x1, #4]
```

Now it looks like this:

```
  # Insn: v18 LoadField v17, :_shape_id@0x4
  # Load field id=_shape_id offset=4
  0x12339c320: ldur w1, [x0, #4]
```

We were able to eliminate a reg-reg copy.
tekknolagi pushed a commit that referenced this pull request Apr 6, 2026
@peterzhu2118
Fix memory leak in pm_parse_process
c341399 
pm_parse_process initializes the index_lookup_table but nothing seems to
use it after it has been allocated. However, pm_compile_scope_node will
overwrite the index_lookup_table and cause it to leak memory. This can
be seen during bootup with the following memory leaks reported by ASAN:

    #0 0x60dba31b7af3 in malloc
    #1 0x60dba32e0718 in rb_gc_impl_malloc gc/default/default.c:8287:5
    #2 0x60dba32c7aa7 in ruby_xmalloc_body gc.c:5373:12
    #3 0x60dba32c4a54 in ruby_xmalloc gc.c:5355:34
    #4 0x60dba3260314 in pm_index_lookup_table_init_heap prism_compile.h:89:29
    #5 0x60dba3209388 in pm_parse_process prism_compile.c:11366:5
tekknolagi pushed a commit that referenced this pull request Jun 10, 2026
@tenderlove
ZJIT: Use shape id as cache key for object layout (ruby#17187)
1c004aa 
* ZJIT: Use shape id as cache key for object layout

Since ruby#17158, we can use the shape id as our cache key for determining
object layout.  This patch changes ZJIT to use shape id instead of
testing all bits.

Given this program:

```ruby
class Foo
  def initialize; @bar = 123; end
  def read; @bar; end
  def add; @baz = 123; end
end

foo = Foo.new
3.times {
  foo = Foo.new
  foo.read
  foo.add
  foo.read
}
```

We end up with a polymorphic read in the `read` method.  On master, the
HIR looks like this:

```
Optimized HIR:
fn read@../test.rb:9:
bb1():
  EntryPoint interpreter
  v1:HeapBasicObject = LoadSelf
  Jump bb3(v1)
bb2():
  EntryPoint JIT(0)
  v4:HeapBasicObject = LoadArg :self@0
  Jump bb3(v4)
bb3(v6:HeapBasicObject):
  PatchPoint SingleRactorMode
  v12:CUInt64 = LoadField v6, :RBASIC_FLAGS@0x0
  v14:CUInt64[0xffffffff0000001f] = Const CUInt64(0xffffffff0000001f)
  v15:CPtr[CPtr(0x8000800000001)] = Const CPtr(0x8000800000001)
  v16 = RefineType v15, CUInt64
  v17:CInt64 = IntAnd v12, v14
  v18:CBool = IsBitEqual v17, v16
  CondBranch v18, bb5(), bb6()
bb5():
  v20:BasicObject = LoadField v6, :@bar@0x10
  Jump bb4(v20)
bb6():
  v22:CUInt64[0xffffffff0000001f] = Const CUInt64(0xffffffff0000001f)
  v23:CPtr[CPtr(0x8000900000001)] = Const CPtr(0x8000900000001)
  v24 = RefineType v23, CUInt64
  v25:CInt64 = IntAnd v12, v22
  v26:CBool = IsBitEqual v25, v24
  CondBranch v26, bb7(), bb8()
bb7():
  v28:BasicObject = LoadField v6, :@bar@0x10
  Jump bb4(v28)
bb8():
  v30:BasicObject = GetIvar v6, :@bar
  Jump bb4(v30)
bb4(v13:BasicObject):
  CheckInterrupts
  Return v13
```

On this branch, the HIR is like this:

```
Optimized HIR:
fn read@../test.rb:9:
bb1():
  EntryPoint interpreter
  v1:HeapBasicObject = LoadSelf
  Jump bb3(v1)
bb2():
  EntryPoint JIT(0)
  v4:HeapBasicObject = LoadArg :self@0
  Jump bb3(v4)
bb3(v6:HeapBasicObject):
  PatchPoint SingleRactorMode
  v13:CShape = LoadField v6, :shape_id@0x4
  v14:CShape[0x80008] = Const CShape(0x80008)
  v15:CBool = IsBitEqual v14, v13
  CondBranch v15, bb5(), bb6()
bb5():
  v17:BasicObject = LoadField v6, :@bar@0x10
  Jump bb4(v17)
bb6():
  v19:CShape = LoadField v6, :shape_id@0x4
  v20:CShape[0x80009] = Const CShape(0x80009)
  v21:CBool = IsBitEqual v20, v19
  CondBranch v21, bb7(), bb8()
bb7():
  v23:BasicObject = LoadField v6, :@bar@0x10
  Jump bb4(v23)
bb8():
  v25:BasicObject = GetIvar v6, :@bar
  Jump bb4(v25)
bb4(v12:BasicObject):
  CheckInterrupts
  Return v12
```

We're able to avoid loading all of the flags, applying a mask, and the
testing.

The machine code for bb3 looks like this on master (I've removed the nop
buffers for patch points):

```
  # Insn: v12 LoadField v6, :RBASIC_FLAGS@0x0
  # Load field id=RBASIC_FLAGS offset=0
  0x122c50124: ldur x1, [x0]
  # Insn: v14 Const CUInt64(0xffffffff0000001f)
  # Insn: v15 Const CPtr(0x8000800000001)
  # Insn: v16 RefineType v15, CUInt64
  # Insn: v17 IntAnd v12, v14
  0x122c50128: and x2, x1, #0xffffffff0000001f
  # Insn: v18 IsBitEqual v17, v16
  0x122c5012c: mov x3, #1
  0x122c50130: movk x3, #0, lsl Shopify#16
  0x122c50134: movk x3, Shopify#8, lsl Shopify#32
  0x122c50138: movk x3, Shopify#8, lsl Shopify#48
  0x122c5013c: cmp x2, x3
  0x122c50140: mov x2, #1
  0x122c50144: mov x3, #0
  0x122c50148: csel x2, x2, x3, eq
  0x122c5014c: tst x2, x2
  0x122c50150: b.ne #0x122c501e8
```

On this branch it looks like this:

```
  # Insn: v13 LoadField v6, :shape_id@0x4
  # Load field id=shape_id offset=4
  0x124dd0124: ldur w1, [x0, #4]
  # Insn: v14 Const CShape(0x80008)
  # Insn: v15 IsBitEqual v14, v13
  0x124dd0128: mov x2, Shopify#8
  0x124dd012c: movk x2, Shopify#8, lsl Shopify#16
  0x124dd0130: cmp x2, x1
  0x124dd0134: mov x1, #1
  0x124dd0138: mov x2, #0
  0x124dd013c: csel x1, x1, x2, eq
  0x124dd0140: tst x1, x1
  0x124dd0144: b.ne #0x124dd01d4
```

We've eliminated the `and` instruction and only need to do a 32 bit load
for the shape.

* fix operand order

* Remove comments and whitespace

* remove stuttering

* fix variable name to be more clear

* Keep assert

* update snapshots
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