From 648a5ff2341e7c15ae98625e341b8e3b0c36c972 Mon Sep 17 00:00:00 2001 From: unmeshna Date: Thu, 30 Jul 2026 04:32:44 -0700 Subject: [PATCH 1/2] signal: fix HiFi4 build for cores without XT_NSAU Guard XT_NSAU usage in msb_32/msb_64 with defined(XT_NSAU) so the build falls back to __builtin_clz on Xtensa cores that do not expose the nsau intrinsic (e.g. AE_HiFi4_LE5_FP_XC). Disable the xtensa_square_root.S assembly path (uses the unsupported nsau opcode) and its filter_bank_square_root.cc wrapper by renaming to .bak, matching the cad-audio port; the build then uses the reference C square-root implementation. --- ...ilter_bank_square_root.cc => filter_bank_square_root.cc.bak} | 0 .../xtensa/{xtensa_square_root.S => xtensa_square_root.S.bak} | 0 signal/src/msb_32.cc | 2 +- signal/src/msb_64.cc | 2 +- 4 files changed, 2 insertions(+), 2 deletions(-) rename signal/micro/kernels/xtensa/{filter_bank_square_root.cc => filter_bank_square_root.cc.bak} (100%) rename signal/micro/kernels/xtensa/{xtensa_square_root.S => xtensa_square_root.S.bak} (100%) diff --git a/signal/micro/kernels/xtensa/filter_bank_square_root.cc b/signal/micro/kernels/xtensa/filter_bank_square_root.cc.bak similarity index 100% rename from signal/micro/kernels/xtensa/filter_bank_square_root.cc rename to signal/micro/kernels/xtensa/filter_bank_square_root.cc.bak diff --git a/signal/micro/kernels/xtensa/xtensa_square_root.S b/signal/micro/kernels/xtensa/xtensa_square_root.S.bak similarity index 100% rename from signal/micro/kernels/xtensa/xtensa_square_root.S rename to signal/micro/kernels/xtensa/xtensa_square_root.S.bak diff --git a/signal/src/msb_32.cc b/signal/src/msb_32.cc index 424a63ec2b5..0e381844446 100644 --- a/signal/src/msb_32.cc +++ b/signal/src/msb_32.cc @@ -27,7 +27,7 @@ namespace tflm_signal { // TODO(b/291167350): can allow __builtin_clz to be used in more cases here uint32_t MostSignificantBit32(uint32_t x) { -#if defined(XTENSA) +#if defined(XTENSA) && defined(XT_NSAU) // XT_NSAU returns the number of left shifts needed to put the MSB in the // leftmost position. Returns 32 if the argument is 0. return 32 - XT_NSAU(x); diff --git a/signal/src/msb_64.cc b/signal/src/msb_64.cc index ce99590fe06..50416c12c99 100644 --- a/signal/src/msb_64.cc +++ b/signal/src/msb_64.cc @@ -26,7 +26,7 @@ namespace tflm_signal { // TODO(b/286250473): remove namespace once de-duped libraries above uint32_t MostSignificantBit64(uint64_t x) { -#if defined(XTENSA) +#if defined(XTENSA) && defined(XT_NSAU) // XT_NSAU returns the number of left shifts needed to put the MSB in the // leftmost position. Returns 32 if the argument is 0. uint32_t upper = 64 - XT_NSAU((uint32_t)(x >> 32)); From aa6277ec7783fea3ba5ab6d03d45bac787b263ff Mon Sep 17 00:00:00 2001 From: unmeshna Date: Thu, 30 Jul 2026 04:41:09 -0700 Subject: [PATCH 2/2] Used GetBuiltinCode() wrapper function instead of opcode->builtin_code() function to ensure opcode read compatibility between the TFLite v3 and v3a schema versions. --- tensorflow/lite/micro/micro_allocation_info.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tensorflow/lite/micro/micro_allocation_info.cc b/tensorflow/lite/micro/micro_allocation_info.cc index a89a5e6c29a..d0e751145f6 100644 --- a/tensorflow/lite/micro/micro_allocation_info.cc +++ b/tensorflow/lite/micro/micro_allocation_info.cc @@ -23,6 +23,7 @@ limitations under the License. #include "tensorflow/lite/micro/memory_helpers.h" #include "tensorflow/lite/micro/memory_planner/greedy_memory_planner.h" #include "tensorflow/lite/micro/micro_log.h" +#include "tensorflow/lite/schema/schema_utils.h" namespace tflite { @@ -59,7 +60,7 @@ TfLiteStatus AllocationInfoBuilder::MarkSubgraphLifetimesIfNecessary( int second_subgraph_index = -1; const OperatorCode* opcode = model_->operator_codes()->Get(op->opcode_index()); - switch (opcode->builtin_code()) { + switch (GetBuiltinCode(opcode)) { case BuiltinOperator_IF: { first_subgraph_index = op->builtin_options_as_IfOptions()->then_subgraph_index();