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Fix build for cores without XT_NSAU, update in micro_allocations_info.cc - #3643

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unmeshna017:xtensa_hifi4_build_fixes
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Fix build for cores without XT_NSAU, update in micro_allocations_info.cc#3643
unmeshna017 wants to merge 2 commits into
tensorflow:mainfrom
unmeshna017:xtensa_hifi4_build_fixes

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  • The signal square-root code assumes the Xtensa nsau instruction is always available, which breaks the build on HiFi4 cores where the XT_NSAU intrinsic is not defined.
  • Used GetBuiltinCode() wrapper function instead of opcode->builtin_code() function in micro_allocations_info.cc to ensure opcode read compatibility between the TFLite v3 and v3a schema versions.

Adding @cad-audio and @joshih-cad for review

Guard XT_NSAU usage in msb_32/msb_64 with defined(XT_NSAU) so the build falls back to __builtin_clz on Xtensa cores that do not expose the nsau intrinsic (e.g. AE_HiFi4_LE5_FP_XC). Disable the xtensa_square_root.S assembly path (uses the unsupported nsau opcode) and its filter_bank_square_root.cc wrapper by renaming to .bak, matching the cad-audio port; the build then uses the reference C square-root implementation.
…e() function to ensure opcode read compatibility between the TFLite v3 and v3a schema versions.
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unmeshna017 marked this pull request as ready for review July 31, 2026 07:51
@unmeshna017
unmeshna017 requested a review from a team as a code owner July 31, 2026 07:51
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