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Advanced_Hardware/Vector_Processing_FPUs.md

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Communication_Protocols/I2C_Protocol.md

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@@ -32,6 +32,11 @@ I2C (Inter-Integrated Circuit) is a synchronous, multi-master, multi-slave, pack
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- **Clock stretching** - Slaves can slow down communication
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- **Arbitration** - Non-destructive arbitration for bus access
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### **Interviewer intent (what they’re probing)**
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- Can you explain open‑drain + pull‑ups and rise‑time limits?
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- Do you understand arbitration and clock stretching behavior?
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- Can you reason about bus speed vs capacitance?
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## 🤔 **What is I2C Protocol?**
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I2C protocol is a synchronous serial communication standard that enables multiple devices to communicate over a shared two-wire bus. It uses a master-slave architecture with support for multiple masters, making it ideal for connecting multiple integrated circuits, sensors, and peripheral devices in embedded systems.

Communication_Protocols/SPI_Protocol.md

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- **Chip select management** - Individual slave selection
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- **Configurable clock modes** - Flexible timing requirements
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### **Interviewer intent (what they’re probing)**
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- Can you explain CPOL/CPHA and timing setup/hold?
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- Do you know how chip‑select timing affects multi‑slave buses?
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- Can you reason about throughput vs CPU/DMA trade‑offs?
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## 🤔 **What is SPI Protocol?**
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SPI protocol is a synchronous serial communication standard that enables high-speed data exchange between a master device (typically a microcontroller) and one or more slave devices (peripherals such as sensors, memory chips, displays, etc.). It uses a shared clock signal to synchronize data transmission, ensuring reliable and efficient communication.

Communication_Protocols/UART_Protocol.md

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- **Error Detection**: Parity checking, frame errors, overrun detection
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- **Flow Control**: Hardware and software flow control mechanisms
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### **Interviewer intent (what they’re probing)**
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- Can you explain framing, baud tolerance, and typical errors?
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- Do you know when to use hardware vs software flow control?
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- Can you design a robust RX/TX buffering strategy?
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## 🧠 **Concept First**

Embedded_C/Bit_Manipulation.md

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- Define `*_Pos` and `*_Msk` macros or enums; avoid magic numbers.
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- Document endianness where on-wire vs in-memory order differs.
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### Interviewer intent (what they’re probing)
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- Can you update a bitfield without breaking neighbors?
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- Do you understand UB around shifts and signed types?
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- Can you reason about endianness and on-wire layouts?
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## 🧪 Guided Labs

Embedded_C/C_Language_Fundamentals.md

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@@ -144,22 +144,22 @@ C is primarily a **procedural programming language**, which means:
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### **Memory Model**
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C uses a **static memory model** with manual memory management:
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C defines an abstract machine; the actual memory layout is implementation-defined. Embedded targets typically place code in Flash/ROM and data in RAM, and the linker script controls section placement.
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```
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C Memory Layout:
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Typical Embedded Memory Layout (varies by target/toolchain):
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┌─────────────────────────────────────────────────────────────┐
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│ Stack (Local Variables) │
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│ ↓ Grows downward
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│ ↓ Often grows downward
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├─────────────────────────────────────────────────────────────┤
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│ Heap (Dynamic Memory) │
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│ ↑ Grows upward
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│ ↑ Often grows upward
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├─────────────────────────────────────────────────────────────┤
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│ .bss (Uninitialized Data)
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│ .bss (Zero-initialized Data) │
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├─────────────────────────────────────────────────────────────┤
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│ .data (Initialized Data) │
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│ .data (Initialized Data)
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├─────────────────────────────────────────────────────────────┤
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│ .text (Code)
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│ .text/.rodata (Code/Const)
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└─────────────────────────────────────────────────────────────┘
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```
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### **Scope and Lifetime**
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**Scope Rules:**
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- **File Scope**: Variables declared outside functions
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- **Function Scope**: Variables declared inside functions
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- **Block Scope**: Variables declared inside code blocks
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- **Global Scope**: Variables accessible throughout the program
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- **File Scope**: Identifiers declared outside any function
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- **Block Scope**: Identifiers declared inside `{}` blocks (including function bodies)
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- **Prototype Scope**: Parameter names in function prototypes
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- **Function Scope**: Labels only (used with `goto`)
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**Lifetime Rules:**
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- **Automatic**: Local variables (stack-based)
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#### **Floating Point Types**
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```c
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float single_precision; // 32-bit IEEE 754
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double double_precision; // 64-bit IEEE 754 (avoid in embedded)
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float single_precision; // Typically 32-bit IEEE 754
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double double_precision; // Implementation-defined (32 or 64-bit)
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```
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#### **Character Types**
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**Memory Types:**
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- **Stack Memory**: Automatic allocation for local variables
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- **Heap Memory**: Dynamic allocation with malloc/free
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- **Static Memory**: Global and static variables
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- **Constant Memory**: Read-only data and code
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- **Heap Memory**: Dynamic allocation with malloc/free (if enabled)
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- **Static Storage**: Global and static variables
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- **Flash/ROM**: Read-only code and const data (platform concept)
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**Memory Lifecycle:**
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- **Allocation**: Requesting memory from the system
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### Why it matters in embedded
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- Knowing when decay happens prevents bugs with `sizeof` and parameter passing.
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- Arrays placed in Flash as `static const` look like ordinary arrays but are read‑only and may require `volatile` when mapped to hardware.
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- Arrays placed in Flash as `static const` look like ordinary arrays but are read‑only; use `volatile` only for memory‑mapped registers or data changed by hardware/ISRs.
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### Minimal example: decay and sizeof
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```c
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uint8_t raw[34];
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> Note: Type-punning through unions is implementation-defined in C. For strict portability, use `memcpy` to move between object representations.
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## 🔧 **Preprocessor Directives**
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### **Standards**
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- **C11**: Current C language standard
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- **C99**: Previous C language standard
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- **C11**: Widely used in embedded toolchains
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- **C17/C18**: Bug-fix revision of C11
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- **C23**: Latest ISO C standard (toolchain support varies)
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- **MISRA C**: Safety-critical coding standard
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Embedded_C/Memory_Mapped_IO.md

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- Be explicit about read-only/write-only semantics via `const` on `volatile` fields.
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- Consider memory barriers for ordering on platforms that require them.
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### Interviewer intent (what they’re probing)
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- Can you model registers safely and clearly in C?
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- Do you know why `volatile` matters and what it doesn’t solve?
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- Can you explain read‑modify‑write hazards and ordering?
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## 🧪 Guided Labs

Embedded_C/Pointers_Memory_Addresses.md

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- Prefer `restrict` only when you can prove non-aliasing.
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### Interviewer intent (what they’re probing)
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- Can you explain lifetime, aliasing, and safe access patterns?
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- Do you know when to use `volatile` vs `const` vs `restrict`?
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- Can you reason about pointer decay and address arithmetic?
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Embedded_C/Type_Qualifiers.md

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- `const` expresses intent and may change placement; don’t cast it away to write.
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- Use `restrict` only when you can prove no aliasing.
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### Interviewer intent (what they’re probing)
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- Do you know when `volatile` is required and when it is insufficient?
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- Can you explain how `const` affects placement and safety?
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- Do you understand aliasing and when `restrict` is valid?
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> Platform note: For I/O ordering on some MCUs/SoCs, pair volatile accesses with memory barriers when required by the architecture.
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Hardware_Fundamentals/External_Interrupts.md

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- **Interrupt Latency** - Time from interrupt occurrence to handler execution
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- **Debouncing** - Eliminating false triggers from mechanical switches
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### **Interviewer intent (what they’re probing)**
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- Can you choose edge vs level correctly and explain why?
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- Do you know how to keep ISRs short and safe?
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- Can you reason about latency, priority, and masking?
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## 🔍 Visual Understanding

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