Skip to content

Commit 5b4a47d

Browse files
airliedairlied
committed
Merge tag 'drm-msm-fixes-2026-05-17' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
Fixes for v7.1: Core: - Fixed bindings for SM8650, SM8750 and Eliza - Don't use UTS_RELEASE directly - Fix typo in clock-names property DPU: - Fixed CWB description on Kaanapali - Fixed scanline strides for YUV UBWC formats - Stopped DSI register dumping to access past the end of region DSI: - Fix dumping unaligned regions GPU: - Fix GMEM_BASE for a6xx gen3 - Fix userspace reachable crash on a2xx-a4xx - Fix sysprof_active for counter collection with IFPC enabled GPUs - Fix shrinker lockdep Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <rob.clark@oss.qualcomm.com> Link: https://patch.msgid.link/CACSVV02cTK7h=d0uqanRE-cj35THDqFjqsTB_2zQV1Mcw77aNw@mail.gmail.com
2 parents 5200f5f + db339b6 commit 5b4a47d

17 files changed

Lines changed: 113 additions & 69 deletions

‎Documentation/devicetree/bindings/display/msm/dp-controller.yaml‎

Lines changed: 23 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -219,6 +219,7 @@ allOf:
219219
- required:
220220
- "#sound-dai-cells"
221221
else:
222+
$ref: /schemas/sound/dai-common.yaml#
222223
properties:
223224
aux-bus: false
224225
required:
@@ -243,7 +244,7 @@ allOf:
243244
clocks:
244245
minItems: 5
245246
maxItems: 5
246-
clocks-names:
247+
clock-names:
247248
minItems: 5
248249
maxItems: 5
249250

@@ -264,7 +265,7 @@ allOf:
264265
clocks:
265266
minItems: 5
266267
maxItems: 6
267-
clocks-names:
268+
clock-names:
268269
minItems: 5
269270
maxItems: 6
270271

@@ -277,7 +278,6 @@ allOf:
277278
- qcom,sc8180x-dp
278279
- qcom,sdm845-dp
279280
- qcom,sm8350-dp
280-
- qcom,sm8650-dp
281281
then:
282282
properties:
283283
reg:
@@ -286,6 +286,24 @@ allOf:
286286
clocks:
287287
minItems: 6
288288
maxItems: 6
289+
clock-names:
290+
minItems: 6
291+
maxItems: 6
292+
293+
- if:
294+
properties:
295+
compatible:
296+
contains:
297+
enum:
298+
- qcom,sm8650-dp
299+
then:
300+
properties:
301+
reg:
302+
minItems: 5
303+
maxItems: 9
304+
clocks:
305+
minItems: 6
306+
maxItems: 6
289307
clocks-names:
290308
minItems: 6
291309
maxItems: 6
@@ -306,7 +324,7 @@ allOf:
306324
clocks:
307325
minItems: 6
308326
maxItems: 8
309-
clocks-names:
327+
clock-names:
310328
minItems: 6
311329
maxItems: 8
312330

@@ -326,7 +344,7 @@ allOf:
326344
clocks:
327345
minItems: 5
328346
maxItems: 6
329-
clocks-names:
347+
clock-names:
330348
minItems: 5
331349
maxItems: 6
332350

‎Documentation/devicetree/bindings/display/msm/qcom,eliza-mdss.yaml‎

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ examples:
119119
mdss_mdp: display-controller@ae01000 {
120120
compatible = "qcom,eliza-dpu";
121121
reg = <0x0ae01000 0x93000>,
122-
<0x0aeb0000 0x2008>;
122+
<0x0aeb0000 0x3000>;
123123
reg-names = "mdp",
124124
"vbif";
125125
@@ -304,7 +304,7 @@ examples:
304304
mdss_dsi0_phy: phy@ae95000 {
305305
compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
306306
reg = <0x0ae95000 0x200>,
307-
<0x0ae95200 0x280>,
307+
<0x0ae95200 0x300>,
308308
<0x0ae95500 0x400>;
309309
reg-names = "dsi_phy",
310310
"dsi_phy_lane",
@@ -388,7 +388,7 @@ examples:
388388
mdss_dsi1_phy: phy@ae97000 {
389389
compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
390390
reg = <0x0ae97000 0x200>,
391-
<0x0ae97200 0x280>,
391+
<0x0ae97200 0x300>,
392392
<0x0ae97500 0x400>;
393393
reg-names = "dsi_phy",
394394
"dsi_phy_lane",
@@ -407,11 +407,15 @@ examples:
407407
408408
displayport-controller@af54000 {
409409
compatible = "qcom,eliza-dp", "qcom,sm8650-dp";
410-
reg = <0xaf54000 0x104>,
411-
<0xaf54200 0xc0>,
412-
<0xaf55000 0x770>,
413-
<0xaf56000 0x9c>,
414-
<0xaf57000 0x9c>;
410+
reg = <0x0af54000 0x200>,
411+
<0x0af54200 0x200>,
412+
<0x0af55000 0xc00>,
413+
<0x0af56000 0x400>,
414+
<0x0af57000 0x400>,
415+
<0x0af58000 0x400>,
416+
<0x0af59000 0x400>,
417+
<0x0af5a000 0x600>,
418+
<0x0af5b000 0x600>;
415419
416420
interrupts-extended = <&mdss 12>;
417421

‎Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ examples:
7070
display-controller@ae01000 {
7171
compatible = "qcom,sm8650-dpu";
7272
reg = <0x0ae01000 0x8f000>,
73-
<0x0aeb0000 0x2008>;
73+
<0x0aeb0000 0x3000>;
7474
reg-names = "mdp", "vbif";
7575
7676
clocks = <&gcc_axi_clk>,

‎Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ examples:
112112
display-controller@ae01000 {
113113
compatible = "qcom,sm8650-dpu";
114114
reg = <0x0ae01000 0x8f000>,
115-
<0x0aeb0000 0x2008>;
115+
<0x0aeb0000 0x3000>;
116116
reg-names = "mdp", "vbif";
117117
118118
clocks = <&gcc_axi_clk>,

‎Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml‎

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ examples:
117117
display-controller@ae01000 {
118118
compatible = "qcom,sm8750-dpu";
119119
reg = <0x0ae01000 0x93000>,
120-
<0x0aeb0000 0x2008>;
120+
<0x0aeb0000 0x3000>;
121121
reg-names = "mdp",
122122
"vbif";
123123
@@ -389,11 +389,15 @@ examples:
389389
390390
displayport-controller@af54000 {
391391
compatible = "qcom,sm8750-dp", "qcom,sm8650-dp";
392-
reg = <0xaf54000 0x104>,
393-
<0xaf54200 0xc0>,
394-
<0xaf55000 0x770>,
395-
<0xaf56000 0x9c>,
396-
<0xaf57000 0x9c>;
392+
reg = <0x0af54000 0x200>,
393+
<0x0af54200 0x200>,
394+
<0x0af55000 0xc00>,
395+
<0x0af56000 0x400>,
396+
<0x0af57000 0x400>,
397+
<0x0af58000 0x400>,
398+
<0x0af59000 0x400>,
399+
<0x0af5a000 0x600>,
400+
<0x0af5b000 0x600>;
397401
398402
interrupts-extended = <&mdss 12>;
399403

‎drivers/gpu/drm/msm/adreno/a6xx_gpu.c‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2621,7 +2621,6 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
26212621
struct platform_device *pdev = priv->gpu_pdev;
26222622
struct adreno_platform_config *config = pdev->dev.platform_data;
26232623
const struct adreno_info *info = config->info;
2624-
struct device_node *node;
26252624
struct a6xx_gpu *a6xx_gpu;
26262625
struct adreno_gpu *adreno_gpu;
26272626
struct msm_gpu *gpu;
@@ -2643,7 +2642,8 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
26432642
adreno_gpu->registers = NULL;
26442643

26452644
/* Check if there is a GMU phandle and set it up */
2646-
node = of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0);
2645+
struct device_node *node __free(device_node) =
2646+
of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0);
26472647
/* FIXME: How do we gracefully handle this? */
26482648
BUG_ON(!node);
26492649

@@ -2690,7 +2690,6 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
26902690
ret = a6xx_gmu_wrapper_init(a6xx_gpu, node);
26912691
else
26922692
ret = a6xx_gmu_init(a6xx_gpu, node);
2693-
of_node_put(node);
26942693
if (ret) {
26952694
a6xx_destroy(&(a6xx_gpu->base.base));
26962695
return ERR_PTR(ret);
@@ -2740,6 +2739,7 @@ const struct adreno_gpu_funcs a6xx_gpu_funcs = {
27402739
.create_private_vm = a6xx_create_private_vm,
27412740
.get_rptr = a6xx_get_rptr,
27422741
.progress = a6xx_progress,
2742+
.sysprof_setup = a6xx_gmu_sysprof_setup,
27432743
},
27442744
.init = a6xx_gpu_init,
27452745
.get_timestamp = a6xx_gmu_get_timestamp,
@@ -2808,6 +2808,7 @@ const struct adreno_gpu_funcs a7xx_gpu_funcs = {
28082808
.create_private_vm = a6xx_create_private_vm,
28092809
.get_rptr = a6xx_get_rptr,
28102810
.progress = a6xx_progress,
2811+
.sysprof_setup = a6xx_gmu_sysprof_setup,
28112812
},
28122813
.init = a6xx_gpu_init,
28132814
.get_timestamp = a6xx_gmu_get_timestamp,

‎drivers/gpu/drm/msm/adreno/a6xx_hfi.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -289,6 +289,8 @@ static int a8xx_hfi_send_perf_table(struct a6xx_gmu *gmu)
289289
(gmu->nr_gpu_freqs * num_gx_votes * sizeof(gmu->gx_arc_votes[0])) +
290290
(gmu->nr_gmu_freqs * num_cx_votes * sizeof(gmu->cx_arc_votes[0]));
291291
tbl = kzalloc(size, GFP_KERNEL);
292+
if (!tbl)
293+
return -ENOMEM;
292294
tbl->type = HFI_TABLE_GPU_PERF;
293295

294296
/* First fill GX votes */

‎drivers/gpu/drm/msm/adreno/adreno_device.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredum
1717
module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);
1818

1919
int enable_preemption = -1;
20-
MODULE_PARM_DESC(enable_preemption, "Enable preemption (A7xx only) (1=on , 0=disable, -1=auto (default))");
20+
MODULE_PARM_DESC(enable_preemption, "Enable preemption (A7xx+ only) (1=on , 0=disable, -1=auto (default))");
2121
module_param(enable_preemption, int, 0600);
2222

2323
bool disable_acd;

‎drivers/gpu/drm/msm/adreno/adreno_gpu.c‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -376,7 +376,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
376376
*value = adreno_gpu->info->gmem;
377377
return 0;
378378
case MSM_PARAM_GMEM_BASE:
379-
if (adreno_gpu->info->family >= ADRENO_6XX_GEN4)
379+
if (adreno_gpu->info->family >= ADRENO_6XX_GEN3)
380380
*value = 0;
381381
else
382382
*value = 0x100000;
@@ -424,15 +424,21 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
424424
*value = vm->mm_range;
425425
return 0;
426426
case MSM_PARAM_HIGHEST_BANK_BIT:
427+
if (!adreno_gpu->ubwc_config)
428+
return UERR(ENOENT, drm, "no UBWC on this platform");
427429
*value = adreno_gpu->ubwc_config->highest_bank_bit;
428430
return 0;
429431
case MSM_PARAM_RAYTRACING:
430432
*value = adreno_gpu->has_ray_tracing;
431433
return 0;
432434
case MSM_PARAM_UBWC_SWIZZLE:
435+
if (!adreno_gpu->ubwc_config)
436+
return UERR(ENOENT, drm, "no UBWC on this platform");
433437
*value = adreno_gpu->ubwc_config->ubwc_swizzle;
434438
return 0;
435439
case MSM_PARAM_MACROTILE_MODE:
440+
if (!adreno_gpu->ubwc_config)
441+
return UERR(ENOENT, drm, "no UBWC on this platform");
436442
*value = adreno_gpu->ubwc_config->macrotile_mode;
437443
return 0;
438444
case MSM_PARAM_UCHE_TRAP_BASE:

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_13_0_kaanapali.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -480,7 +480,7 @@ const struct dpu_mdss_cfg dpu_kaanapali_cfg = {
480480
.wb_count = ARRAY_SIZE(kaanapali_wb),
481481
.wb = kaanapali_wb,
482482
.cwb_count = ARRAY_SIZE(kaanapali_cwb),
483-
.cwb = sm8650_cwb,
483+
.cwb = kaanapali_cwb,
484484
.intf_count = ARRAY_SIZE(kaanapali_intf),
485485
.intf = kaanapali_intf,
486486
.vbif = &sm8650_vbif,

0 commit comments

Comments
 (0)