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airliedairlied
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Merge tag 'drm-intel-next-fixes-2021-11-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Couple Reverts, build fix, couple virtualization fixes, blank screen and other display rates fixes, and more. Four patches targeting stable in here. Display Fixes: - DP rates related fixes (Imre, Jani) - A Revert on disaling dual eDP that was causing state readout problems (Jani) - put the cdclk vtables in const data (Jani) - Fix DVO port type for moder platforms (Ville) - Fix blankscreen by turning DP++ TMDS output buffers on encoder->shutdown (Ville) - CCS FBs related fixes (Imre) GT fixes: - Fix recursive lock in GuC submission (Matt Brost) - Revert guc_id from i915_request tracepoint (Joonas) - Build fix around dmabuf (Matt Auld) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YYsBif3HMi8GjLoU@intel.com
2 parents 4a390c2 + ade4a1f commit 917a6f0

13 files changed

Lines changed: 148 additions & 111 deletions

File tree

‎drivers/gpu/drm/i915/display/g4x_hdmi.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -584,6 +584,7 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv,
584584
else
585585
intel_encoder->enable = g4x_enable_hdmi;
586586
}
587+
intel_encoder->shutdown = intel_hdmi_encoder_shutdown;
587588

588589
intel_encoder->type = INTEL_OUTPUT_HDMI;
589590
intel_encoder->power_domain = intel_port_to_power_domain(port);

‎drivers/gpu/drm/i915/display/intel_bios.c‎

Lines changed: 63 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -1707,6 +1707,39 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
17071707
child->aux_channel = 0;
17081708
}
17091709

1710+
static u8 dvo_port_type(u8 dvo_port)
1711+
{
1712+
switch (dvo_port) {
1713+
case DVO_PORT_HDMIA:
1714+
case DVO_PORT_HDMIB:
1715+
case DVO_PORT_HDMIC:
1716+
case DVO_PORT_HDMID:
1717+
case DVO_PORT_HDMIE:
1718+
case DVO_PORT_HDMIF:
1719+
case DVO_PORT_HDMIG:
1720+
case DVO_PORT_HDMIH:
1721+
case DVO_PORT_HDMII:
1722+
return DVO_PORT_HDMIA;
1723+
case DVO_PORT_DPA:
1724+
case DVO_PORT_DPB:
1725+
case DVO_PORT_DPC:
1726+
case DVO_PORT_DPD:
1727+
case DVO_PORT_DPE:
1728+
case DVO_PORT_DPF:
1729+
case DVO_PORT_DPG:
1730+
case DVO_PORT_DPH:
1731+
case DVO_PORT_DPI:
1732+
return DVO_PORT_DPA;
1733+
case DVO_PORT_MIPIA:
1734+
case DVO_PORT_MIPIB:
1735+
case DVO_PORT_MIPIC:
1736+
case DVO_PORT_MIPID:
1737+
return DVO_PORT_MIPIA;
1738+
default:
1739+
return dvo_port;
1740+
}
1741+
}
1742+
17101743
static enum port __dvo_port_to_port(int n_ports, int n_dvo,
17111744
const int port_mapping[][3], u8 dvo_port)
17121745
{
@@ -1930,50 +1963,6 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
19301963
}
19311964
}
19321965

1933-
static enum port get_edp_port(struct drm_i915_private *i915)
1934-
{
1935-
const struct intel_bios_encoder_data *devdata;
1936-
enum port port;
1937-
1938-
for_each_port(port) {
1939-
devdata = i915->vbt.ports[port];
1940-
1941-
if (devdata && intel_bios_encoder_supports_edp(devdata))
1942-
return port;
1943-
}
1944-
1945-
return PORT_NONE;
1946-
}
1947-
1948-
/*
1949-
* FIXME: The power sequencer and backlight code currently do not support more
1950-
* than one set registers, at least not on anything other than VLV/CHV. It will
1951-
* clobber the registers. As a temporary workaround, gracefully prevent more
1952-
* than one eDP from being registered.
1953-
*/
1954-
static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
1955-
enum port port)
1956-
{
1957-
struct drm_i915_private *i915 = devdata->i915;
1958-
struct child_device_config *child = &devdata->child;
1959-
enum port p;
1960-
1961-
/* CHV might not clobber PPS registers. */
1962-
if (IS_CHERRYVIEW(i915))
1963-
return;
1964-
1965-
p = get_edp_port(i915);
1966-
if (p == PORT_NONE)
1967-
return;
1968-
1969-
drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
1970-
"disabling port %c eDP\n", port_name(p), port_name(port),
1971-
port_name(port));
1972-
1973-
child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1974-
child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
1975-
}
1976-
19771966
static bool is_port_valid(struct drm_i915_private *i915, enum port port)
19781967
{
19791968
/*
@@ -2031,9 +2020,6 @@ static void parse_ddi_port(struct drm_i915_private *i915,
20312020
supports_typec_usb, supports_tbt,
20322021
devdata->dsc != NULL);
20332022

2034-
if (is_edp)
2035-
sanitize_dual_edp(devdata, port);
2036-
20372023
if (is_dvi)
20382024
sanitize_ddc_pin(devdata, port);
20392025

@@ -2670,35 +2656,17 @@ bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
26702656
return false;
26712657
}
26722658

2673-
static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2674-
enum port port)
2659+
static bool child_dev_is_dp_dual_mode(const struct child_device_config *child)
26752660
{
2676-
static const struct {
2677-
u16 dp, hdmi;
2678-
} port_mapping[] = {
2679-
/*
2680-
* Buggy VBTs may declare DP ports as having
2681-
* HDMI type dvo_port :( So let's check both.
2682-
*/
2683-
[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2684-
[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2685-
[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2686-
[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2687-
[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2688-
};
2689-
2690-
if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2691-
return false;
2692-
26932661
if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
26942662
(DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
26952663
return false;
26962664

2697-
if (child->dvo_port == port_mapping[port].dp)
2665+
if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
26982666
return true;
26992667

27002668
/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2701-
if (child->dvo_port == port_mapping[port].hdmi &&
2669+
if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
27022670
child->aux_channel != 0)
27032671
return true;
27042672

@@ -2708,10 +2676,36 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
27082676
bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
27092677
enum port port)
27102678
{
2679+
static const struct {
2680+
u16 dp, hdmi;
2681+
} port_mapping[] = {
2682+
/*
2683+
* Buggy VBTs may declare DP ports as having
2684+
* HDMI type dvo_port :( So let's check both.
2685+
*/
2686+
[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2687+
[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2688+
[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2689+
[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2690+
[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2691+
};
27112692
const struct intel_bios_encoder_data *devdata;
27122693

2694+
if (HAS_DDI(i915)) {
2695+
const struct intel_bios_encoder_data *devdata;
2696+
2697+
devdata = intel_bios_encoder_data_lookup(i915, port);
2698+
2699+
return devdata && child_dev_is_dp_dual_mode(&devdata->child);
2700+
}
2701+
2702+
if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2703+
return false;
2704+
27132705
list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2714-
if (child_dev_is_dp_dual_mode(&devdata->child, port))
2706+
if ((devdata->child.dvo_port == port_mapping[port].dp ||
2707+
devdata->child.dvo_port == port_mapping[port].hdmi) &&
2708+
child_dev_is_dp_dual_mode(&devdata->child))
27152709
return true;
27162710
}
27172711

‎drivers/gpu/drm/i915/display/intel_cdclk.c‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -2885,152 +2885,152 @@ u32 intel_read_rawclk(struct drm_i915_private *dev_priv)
28852885
return freq;
28862886
}
28872887

2888-
static struct intel_cdclk_funcs tgl_cdclk_funcs = {
2888+
static const struct intel_cdclk_funcs tgl_cdclk_funcs = {
28892889
.get_cdclk = bxt_get_cdclk,
28902890
.set_cdclk = bxt_set_cdclk,
28912891
.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
28922892
.modeset_calc_cdclk = bxt_modeset_calc_cdclk,
28932893
.calc_voltage_level = tgl_calc_voltage_level,
28942894
};
28952895

2896-
static struct intel_cdclk_funcs ehl_cdclk_funcs = {
2896+
static const struct intel_cdclk_funcs ehl_cdclk_funcs = {
28972897
.get_cdclk = bxt_get_cdclk,
28982898
.set_cdclk = bxt_set_cdclk,
28992899
.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
29002900
.modeset_calc_cdclk = bxt_modeset_calc_cdclk,
29012901
.calc_voltage_level = ehl_calc_voltage_level,
29022902
};
29032903

2904-
static struct intel_cdclk_funcs icl_cdclk_funcs = {
2904+
static const struct intel_cdclk_funcs icl_cdclk_funcs = {
29052905
.get_cdclk = bxt_get_cdclk,
29062906
.set_cdclk = bxt_set_cdclk,
29072907
.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
29082908
.modeset_calc_cdclk = bxt_modeset_calc_cdclk,
29092909
.calc_voltage_level = icl_calc_voltage_level,
29102910
};
29112911

2912-
static struct intel_cdclk_funcs bxt_cdclk_funcs = {
2912+
static const struct intel_cdclk_funcs bxt_cdclk_funcs = {
29132913
.get_cdclk = bxt_get_cdclk,
29142914
.set_cdclk = bxt_set_cdclk,
29152915
.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
29162916
.modeset_calc_cdclk = bxt_modeset_calc_cdclk,
29172917
.calc_voltage_level = bxt_calc_voltage_level,
29182918
};
29192919

2920-
static struct intel_cdclk_funcs skl_cdclk_funcs = {
2920+
static const struct intel_cdclk_funcs skl_cdclk_funcs = {
29212921
.get_cdclk = skl_get_cdclk,
29222922
.set_cdclk = skl_set_cdclk,
29232923
.bw_calc_min_cdclk = skl_bw_calc_min_cdclk,
29242924
.modeset_calc_cdclk = skl_modeset_calc_cdclk,
29252925
};
29262926

2927-
static struct intel_cdclk_funcs bdw_cdclk_funcs = {
2927+
static const struct intel_cdclk_funcs bdw_cdclk_funcs = {
29282928
.get_cdclk = bdw_get_cdclk,
29292929
.set_cdclk = bdw_set_cdclk,
29302930
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29312931
.modeset_calc_cdclk = bdw_modeset_calc_cdclk,
29322932
};
29332933

2934-
static struct intel_cdclk_funcs chv_cdclk_funcs = {
2934+
static const struct intel_cdclk_funcs chv_cdclk_funcs = {
29352935
.get_cdclk = vlv_get_cdclk,
29362936
.set_cdclk = chv_set_cdclk,
29372937
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29382938
.modeset_calc_cdclk = vlv_modeset_calc_cdclk,
29392939
};
29402940

2941-
static struct intel_cdclk_funcs vlv_cdclk_funcs = {
2941+
static const struct intel_cdclk_funcs vlv_cdclk_funcs = {
29422942
.get_cdclk = vlv_get_cdclk,
29432943
.set_cdclk = vlv_set_cdclk,
29442944
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29452945
.modeset_calc_cdclk = vlv_modeset_calc_cdclk,
29462946
};
29472947

2948-
static struct intel_cdclk_funcs hsw_cdclk_funcs = {
2948+
static const struct intel_cdclk_funcs hsw_cdclk_funcs = {
29492949
.get_cdclk = hsw_get_cdclk,
29502950
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29512951
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29522952
};
29532953

29542954
/* SNB, IVB, 965G, 945G */
2955-
static struct intel_cdclk_funcs fixed_400mhz_cdclk_funcs = {
2955+
static const struct intel_cdclk_funcs fixed_400mhz_cdclk_funcs = {
29562956
.get_cdclk = fixed_400mhz_get_cdclk,
29572957
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29582958
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29592959
};
29602960

2961-
static struct intel_cdclk_funcs ilk_cdclk_funcs = {
2961+
static const struct intel_cdclk_funcs ilk_cdclk_funcs = {
29622962
.get_cdclk = fixed_450mhz_get_cdclk,
29632963
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29642964
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29652965
};
29662966

2967-
static struct intel_cdclk_funcs gm45_cdclk_funcs = {
2967+
static const struct intel_cdclk_funcs gm45_cdclk_funcs = {
29682968
.get_cdclk = gm45_get_cdclk,
29692969
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29702970
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29712971
};
29722972

29732973
/* G45 uses G33 */
29742974

2975-
static struct intel_cdclk_funcs i965gm_cdclk_funcs = {
2975+
static const struct intel_cdclk_funcs i965gm_cdclk_funcs = {
29762976
.get_cdclk = i965gm_get_cdclk,
29772977
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29782978
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29792979
};
29802980

29812981
/* i965G uses fixed 400 */
29822982

2983-
static struct intel_cdclk_funcs pnv_cdclk_funcs = {
2983+
static const struct intel_cdclk_funcs pnv_cdclk_funcs = {
29842984
.get_cdclk = pnv_get_cdclk,
29852985
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29862986
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29872987
};
29882988

2989-
static struct intel_cdclk_funcs g33_cdclk_funcs = {
2989+
static const struct intel_cdclk_funcs g33_cdclk_funcs = {
29902990
.get_cdclk = g33_get_cdclk,
29912991
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29922992
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29932993
};
29942994

2995-
static struct intel_cdclk_funcs i945gm_cdclk_funcs = {
2995+
static const struct intel_cdclk_funcs i945gm_cdclk_funcs = {
29962996
.get_cdclk = i945gm_get_cdclk,
29972997
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
29982998
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
29992999
};
30003000

30013001
/* i945G uses fixed 400 */
30023002

3003-
static struct intel_cdclk_funcs i915gm_cdclk_funcs = {
3003+
static const struct intel_cdclk_funcs i915gm_cdclk_funcs = {
30043004
.get_cdclk = i915gm_get_cdclk,
30053005
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
30063006
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
30073007
};
30083008

3009-
static struct intel_cdclk_funcs i915g_cdclk_funcs = {
3009+
static const struct intel_cdclk_funcs i915g_cdclk_funcs = {
30103010
.get_cdclk = fixed_333mhz_get_cdclk,
30113011
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
30123012
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
30133013
};
30143014

3015-
static struct intel_cdclk_funcs i865g_cdclk_funcs = {
3015+
static const struct intel_cdclk_funcs i865g_cdclk_funcs = {
30163016
.get_cdclk = fixed_266mhz_get_cdclk,
30173017
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
30183018
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
30193019
};
30203020

3021-
static struct intel_cdclk_funcs i85x_cdclk_funcs = {
3021+
static const struct intel_cdclk_funcs i85x_cdclk_funcs = {
30223022
.get_cdclk = i85x_get_cdclk,
30233023
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
30243024
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
30253025
};
30263026

3027-
static struct intel_cdclk_funcs i845g_cdclk_funcs = {
3027+
static const struct intel_cdclk_funcs i845g_cdclk_funcs = {
30283028
.get_cdclk = fixed_200mhz_get_cdclk,
30293029
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
30303030
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,
30313031
};
30323032

3033-
static struct intel_cdclk_funcs i830_cdclk_funcs = {
3033+
static const struct intel_cdclk_funcs i830_cdclk_funcs = {
30343034
.get_cdclk = fixed_133mhz_get_cdclk,
30353035
.bw_calc_min_cdclk = intel_bw_calc_min_cdclk,
30363036
.modeset_calc_cdclk = fixed_modeset_calc_cdclk,

‎drivers/gpu/drm/i915/display/intel_ddi.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4361,6 +4361,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder)
43614361
enum phy phy = intel_port_to_phy(i915, encoder->port);
43624362

43634363
intel_dp_encoder_shutdown(encoder);
4364+
intel_hdmi_encoder_shutdown(encoder);
43644365

43654366
if (!intel_phy_is_tc(i915, phy))
43664367
return;

‎drivers/gpu/drm/i915/display/intel_display.c‎

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -848,9 +848,16 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
848848
int i;
849849

850850
for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
851+
unsigned int plane_size;
852+
853+
plane_size = rem_info->plane[i].dst_stride * rem_info->plane[i].height;
854+
if (plane_size == 0)
855+
continue;
856+
851857
if (rem_info->plane_alignment)
852858
size = ALIGN(size, rem_info->plane_alignment);
853-
size += rem_info->plane[i].dst_stride * rem_info->plane[i].height;
859+
860+
size += plane_size;
854861
}
855862

856863
return size;

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