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torvaldstorvalds
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Merge tag 'riscv-for-linus-5.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt: - Support for time namespaces in the VDSO, along with some associated cleanups. - Support for building rv32 randconfigs. - Improvements to the XIP port that allow larger kernels to function - Various device tree cleanups for both the SiFive and Microchip boards - A handful of defconfig updates, including enabling Nouveau. There are also various small cleanups. * tag 'riscv-for-linus-5.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: defconfig: enable DRM_NOUVEAU riscv/vdso: Drop unneeded part due to merge issue riscv: remove .text section size limitation for XIP riscv: dts: sifive: add missing compatible for plic riscv: dts: microchip: add missing compatibles for clint and plic riscv: dts: sifive: drop duplicated nodes and properties in sifive riscv: dts: sifive: fix Unleashed board compatible riscv: dts: sifive: use only generic JEDEC SPI NOR flash compatible riscv: dts: microchip: use vendor compatible for Cadence SD4HC riscv: dts: microchip: drop unused pinctrl-names riscv: dts: microchip: drop duplicated MMC/SDHC node riscv: dts: microchip: fix board compatible riscv: dts: microchip: drop duplicated nodes dt-bindings: mmc: cdns: document Microchip MPFS MMC/SDHCI controller riscv: add rv32 and rv64 randconfig build targets riscv: mm: don't advertise 1 num_asid for 0 asid bits riscv: set default pm_power_off to NULL riscv/vdso: Add support for time namespaces
2 parents 4218a96 + ffa7a91 commit b89f311

21 files changed

Lines changed: 292 additions & 137 deletions

‎arch/riscv/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,7 @@ config RISCV
6262
select GENERIC_SCHED_CLOCK
6363
select GENERIC_SMP_IDLE_THREAD
6464
select GENERIC_TIME_VSYSCALL if MMU && 64BIT
65+
select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO
6566
select HAVE_ARCH_AUDITSYSCALL
6667
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
6768
select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL

‎arch/riscv/Makefile‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -136,3 +136,13 @@ zinstall: install-image = Image.gz
136136
install zinstall:
137137
$(CONFIG_SHELL) $(srctree)/$(boot)/install.sh $(KERNELRELEASE) \
138138
$(boot)/$(install-image) System.map "$(INSTALL_PATH)"
139+
140+
PHONY += rv32_randconfig
141+
rv32_randconfig:
142+
$(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/32-bit.config \
143+
-f $(srctree)/Makefile randconfig
144+
145+
PHONY += rv64_randconfig
146+
rv64_randconfig:
147+
$(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/64-bit.config \
148+
-f $(srctree)/Makefile randconfig

‎arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts‎

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,8 @@
99
#define RTCCLK_FREQ 1000000
1010

1111
/ {
12-
#address-cells = <2>;
13-
#size-cells = <2>;
1412
model = "Microchip PolarFire-SoC Icicle Kit";
15-
compatible = "microchip,mpfs-icicle-kit";
13+
compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
1614

1715
aliases {
1816
ethernet0 = &emac1;
@@ -35,9 +33,6 @@
3533
reg = <0x0 0x80000000 0x0 0x40000000>;
3634
clocks = <&clkcfg 26>;
3735
};
38-
39-
soc {
40-
};
4136
};
4237

4338
&serial0 {
@@ -56,8 +51,17 @@
5651
status = "okay";
5752
};
5853

59-
&sdcard {
54+
&mmc {
6055
status = "okay";
56+
57+
bus-width = <4>;
58+
disable-wp;
59+
cap-sd-highspeed;
60+
card-detect-delay = <200>;
61+
sd-uhs-sdr12;
62+
sd-uhs-sdr25;
63+
sd-uhs-sdr50;
64+
sd-uhs-sdr104;
6165
};
6266

6367
&emac0 {

‎arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi‎

Lines changed: 7 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@
66
/ {
77
#address-cells = <2>;
88
#size-cells = <2>;
9-
model = "Microchip MPFS Icicle Kit";
10-
compatible = "microchip,mpfs-icicle-kit";
9+
model = "Microchip PolarFire SoC";
10+
compatible = "microchip,mpfs";
1111

1212
chosen {
1313
};
@@ -161,7 +161,7 @@
161161
};
162162

163163
clint@2000000 {
164-
compatible = "sifive,clint0";
164+
compatible = "sifive,fu540-c000-clint", "sifive,clint0";
165165
reg = <0x0 0x2000000 0x0 0xC000>;
166166
interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
167167
&cpu1_intc 3 &cpu1_intc 7
@@ -172,7 +172,7 @@
172172

173173
plic: interrupt-controller@c000000 {
174174
#interrupt-cells = <1>;
175-
compatible = "sifive,plic-1.0.0";
175+
compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
176176
reg = <0x0 0xc000000 0x0 0x4000000>;
177177
riscv,ndev = <186>;
178178
interrupt-controller;
@@ -262,39 +262,13 @@
262262
status = "disabled";
263263
};
264264

265-
emmc: mmc@20008000 {
266-
compatible = "cdns,sd4hc";
265+
/* Common node entry for emmc/sd */
266+
mmc: mmc@20008000 {
267+
compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc";
267268
reg = <0x0 0x20008000 0x0 0x1000>;
268269
interrupt-parent = <&plic>;
269270
interrupts = <88 89>;
270-
pinctrl-names = "default";
271271
clocks = <&clkcfg 6>;
272-
bus-width = <4>;
273-
cap-mmc-highspeed;
274-
mmc-ddr-3_3v;
275-
max-frequency = <200000000>;
276-
non-removable;
277-
no-sd;
278-
no-sdio;
279-
voltage-ranges = <3300 3300>;
280-
status = "disabled";
281-
};
282-
283-
sdcard: sdhc@20008000 {
284-
compatible = "cdns,sd4hc";
285-
reg = <0x0 0x20008000 0x0 0x1000>;
286-
interrupt-parent = <&plic>;
287-
interrupts = <88>;
288-
pinctrl-names = "default";
289-
clocks = <&clkcfg 6>;
290-
bus-width = <4>;
291-
disable-wp;
292-
cap-sd-highspeed;
293-
card-detect-delay = <200>;
294-
sd-uhs-sdr12;
295-
sd-uhs-sdr25;
296-
sd-uhs-sdr50;
297-
sd-uhs-sdr104;
298272
max-frequency = <200000000>;
299273
status = "disabled";
300274
};

‎arch/riscv/boot/dts/sifive/fu540-c000.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,7 @@
141141
ranges;
142142
plic0: interrupt-controller@c000000 {
143143
#interrupt-cells = <1>;
144-
compatible = "sifive,plic-1.0.0";
144+
compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
145145
reg = <0x0 0xc000000 0x0 0x4000000>;
146146
riscv,ndev = <53>;
147147
interrupt-controller;

‎arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts‎

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -8,10 +8,9 @@
88
#define RTCCLK_FREQ 1000000
99

1010
/ {
11-
#address-cells = <2>;
12-
#size-cells = <2>;
1311
model = "SiFive HiFive Unleashed A00";
14-
compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
12+
compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
13+
"sifive,fu540";
1514

1615
chosen {
1716
stdout-path = "serial0";
@@ -26,9 +25,6 @@
2625
reg = <0x0 0x80000000 0x2 0x00000000>;
2726
};
2827

29-
soc {
30-
};
31-
3228
hfclk: hfclk {
3329
#clock-cells = <0>;
3430
compatible = "fixed-clock";
@@ -63,7 +59,7 @@
6359
&qspi0 {
6460
status = "okay";
6561
flash@0 {
66-
compatible = "issi,is25wp256", "jedec,spi-nor";
62+
compatible = "jedec,spi-nor";
6763
reg = <0>;
6864
spi-max-frequency = <50000000>;
6965
m25p,fast-read;

‎arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,6 @@
88
#define RTCCLK_FREQ 1000000
99

1010
/ {
11-
#address-cells = <2>;
12-
#size-cells = <2>;
1311
model = "SiFive HiFive Unmatched A00";
1412
compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
1513
"sifive,fu740";
@@ -27,9 +25,6 @@
2725
reg = <0x0 0x80000000 0x4 0x00000000>;
2826
};
2927

30-
soc {
31-
};
32-
3328
hfclk: hfclk {
3429
#clock-cells = <0>;
3530
compatible = "fixed-clock";
@@ -211,7 +206,7 @@
211206
&qspi0 {
212207
status = "okay";
213208
flash@0 {
214-
compatible = "issi,is25wp256", "jedec,spi-nor";
209+
compatible = "jedec,spi-nor";
215210
reg = <0>;
216211
spi-max-frequency = <50000000>;
217212
m25p,fast-read;

‎arch/riscv/configs/32-bit.config‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
CONFIG_ARCH_RV32I=y
2+
CONFIG_32BIT=y

‎arch/riscv/configs/64-bit.config‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
CONFIG_ARCH_RV64I=y
2+
CONFIG_64BIT=y

‎arch/riscv/configs/defconfig‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -72,9 +72,10 @@ CONFIG_GPIOLIB=y
7272
CONFIG_GPIO_SIFIVE=y
7373
# CONFIG_PTP_1588_CLOCK is not set
7474
CONFIG_POWER_RESET=y
75-
CONFIG_DRM=y
76-
CONFIG_DRM_RADEON=y
77-
CONFIG_DRM_VIRTIO_GPU=y
75+
CONFIG_DRM=m
76+
CONFIG_DRM_RADEON=m
77+
CONFIG_DRM_NOUVEAU=m
78+
CONFIG_DRM_VIRTIO_GPU=m
7879
CONFIG_FRAMEBUFFER_CONSOLE=y
7980
CONFIG_USB=y
8081
CONFIG_USB_XHCI_HCD=y

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