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Add a few fixes for Mediatek mt8188 and mt8195 platforms #10137

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Merged
kv2019i merged 7 commits into from
Sep 3, 2025
Merged

Add a few fixes for Mediatek mt8188 and mt8195 platforms #10137

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2e3f214
platform/mtk: Set AFE unused reg to 0 instead of -1.
andrew-mtk Apr 1, 2025
fa92c53
platform/mtk: Add FS timings for MT818X, MT8195
andrew-mtk May 20, 2025
cacbaad
zephyr: alloc: Limit heap size on MTK platforms
andrew-mtk May 27, 2025
85ab536
drivers/mediatek/afe: Fix DMA buffer alignment for MT818X and MT8195
andrew-mtk May 27, 2025
18f80dc
platform: mtk: Add AFE buffer address translation
andrew-mtk Jun 4, 2025
46e5cd9
zephyr: lib/dma.h: Fix build error in dma-legacy.h
andrew-mtk Jul 22, 2025
46515b0
boards: mtk: Fix "dai_common_copy(): nothing to copy" warning
andrew-mtk Jul 24, 2025
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2 changes: 1 addition & 1 deletion src/platform/mtk/dai.c
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ struct afe_cfg {
*/
static void cfg_convert(const struct afe_cfg *src, struct mtk_base_memif_data *dst)
{
#define REGCVT(R) (((R) > 0) ? ((R) - MTK_AFE_BASE) : -1)
#define REGCVT(R) (((R) > 0) ? ((R) - MTK_AFE_BASE) : 0)

@andyross andyross Jul 25, 2025

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FWIW: this isn't the AFE driver's struct though, it's the Zephyr-side intermediate. I chose -1 because in a few spots it looked like a zero had valid semantic meaning. But I was doing the port blind.

@andrew-mtk andrew-mtk Jul 25, 2025

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@andyross , I've tried to avoid AFE refactoring that were crashing with a memory violation exception when reg_ofs_base_msb and reg_ofs_end_msb were set to -1

sof/src/platform/mtk/dai.c

Lines 92 to 94 in 800f6ce

dst->reg_ofs_base_msb = REGCVT(src->base.hi);
dst->reg_ofs_cur_msb = REGCVT(src->cur.hi);
dst->reg_ofs_end_msb = REGCVT(src->end.hi);

sof/src/drivers/mediatek/afe/afe-drv.c

Lines 179 to 183 in 800f6ce

/* set start, end, upper 32 bits */
if (memif->data->reg_ofs_base_msb) {
afe_reg_write(afe, memif->data->reg_ofs_base_msb, phys_buf_addr_upper_32);
afe_reg_write(afe, memif->data->reg_ofs_end_msb, phys_buf_addr_upper_32);
}


#define COPYBIT(S, Dr, Ds) do { \
dst->Dr = REGCVT(src->S.reg); \
Expand Down