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| 1 | +name: Scanner SIMD tier correctness |
| 2 | + |
| 3 | +on: |
| 4 | + push: |
| 5 | + branches: [main] |
| 6 | + workflow_dispatch: |
| 7 | + |
| 8 | +# Read-only token: this workflow never writes to the repo. |
| 9 | +permissions: |
| 10 | + contents: read |
| 11 | + |
| 12 | +# Per-tier correctness for the runtime-dispatched scanner SIMD verify tiers, run post-merge on push to main and on |
| 13 | +# dispatch (SDE emulation is slow and advisory; the blocking build/test/coverage gate for PRs lives in pr-check.yml). |
| 14 | +# A matrix runs one DMK_ENABLE_AVX512=ON test build under Intel SDE emulating a different CPU per leg, so the runtime |
| 15 | +# gate selects a different verify body each time: -spr (Sapphire Rapids) selects AVX-512, -hsw (Haswell) selects AVX2, |
| 16 | +# -wsm (Westmere) selects SSE2. Each leg runs the full ScannerTest suite (results must match the scalar path) and |
| 17 | +# asserts it actually selected the tier it covers. The Scalar tier is not a leg: on x64 SSE2 is the ABI baseline, so |
| 18 | +# active_simd_level() never returns Scalar and no SDE chip can force it (its code survives as verify tails and the |
| 19 | +# prefilter fallback, exercised within the other legs). Advisory: a leg skips with a warning if SDE cannot be set up. |
| 20 | + |
| 21 | +jobs: |
| 22 | + tier-correctness-sde: |
| 23 | + name: ${{ matrix.tier }} scanner correctness (Intel SDE, advisory) |
| 24 | + runs-on: windows-latest |
| 25 | + continue-on-error: true |
| 26 | + strategy: |
| 27 | + fail-fast: false |
| 28 | + matrix: |
| 29 | + include: |
| 30 | + - tier: AVX-512 |
| 31 | + chip: spr |
| 32 | + - tier: AVX2 |
| 33 | + chip: hsw |
| 34 | + - tier: SSE2 |
| 35 | + chip: wsm |
| 36 | + steps: |
| 37 | + - name: Checkout code |
| 38 | + uses: actions/checkout@34e114876b0b11c390a56381ad16ebd13914f8d5 # v4 |
| 39 | + with: |
| 40 | + submodules: "recursive" |
| 41 | + persist-credentials: false |
| 42 | + |
| 43 | + - name: Set up MSVC (x64) |
| 44 | + uses: ilammy/msvc-dev-cmd@0b201ec74fa43914dc39ae48a89fd1d8cb592756 # v1 |
| 45 | + with: |
| 46 | + arch: x64 |
| 47 | + |
| 48 | + # One DMK_ENABLE_AVX512=ON build serves every leg: the AVX-512 body is compiled in but only selected once the |
| 49 | + # emulated CPU advertises AVX-512, so the -hsw / -wsm legs exercise the AVX2 / SSE2 bodies from the same binary. |
| 50 | + - name: Configure (MSVC Debug + AVX-512 tier) |
| 51 | + shell: pwsh |
| 52 | + run: cmake --preset msvc-debug -DDMK_ENABLE_AVX512=ON |
| 53 | + |
| 54 | + - name: Build tests |
| 55 | + shell: pwsh |
| 56 | + run: cmake --build build/msvc-debug --target DetourModKit_tests --parallel 3 |
| 57 | + |
| 58 | + # Intel SDE executes the selected tier on any CPU, so it validates each tier's results without that hardware. |
| 59 | + # The SHA-pinned setup-sde action exposes the kit in SDE_PATH; if it cannot be set up the run step skips with a |
| 60 | + # warning rather than failing this advisory job. |
| 61 | + - name: Set up Intel SDE |
| 62 | + uses: petarpetrovt/setup-sde@31aa4a8e85e109bef00f1d838613fcc6ec421271 # v5.0 |
| 63 | + continue-on-error: true |
| 64 | + with: |
| 65 | + # SDE 10.8.0 fails to start from some install folders (the runner's extraction path triggers it), so pin a |
| 66 | + # known-good earlier release. The -spr / -hsw / -wsm CPU models are all available in 9.x. |
| 67 | + # Ref: https://community.intel.com/t5/Intel-ISA-Extensions/SDE-10-8-fails-to-start-depending-on-the-installation-folder/m-p/1746386 |
| 68 | + sdeVersion: 9.58.0 |
| 69 | + environmentVariableName: SDE_PATH |
| 70 | + |
| 71 | + - name: Run ScannerTest under Intel SDE (${{ matrix.tier }} via -${{ matrix.chip }}) |
| 72 | + shell: pwsh |
| 73 | + run: | |
| 74 | + # Prefer the dedicated 64-bit launcher (sde64.exe) over the auto-detecting sde.exe. |
| 75 | + $sdeExe = @('sde64.exe', 'sde.exe') | |
| 76 | + ForEach-Object { Join-Path "$env:SDE_PATH" $_ } | |
| 77 | + Where-Object { Test-Path $_ } | |
| 78 | + Select-Object -First 1 |
| 79 | + if (-not $sdeExe) |
| 80 | + { |
| 81 | + Write-Output "::warning::Intel SDE not available; skipping the ${{ matrix.tier }} correctness run." |
| 82 | + exit 0 |
| 83 | + } |
| 84 | + $exe = (Get-ChildItem -Recurse -Path build/msvc-debug -Filter DetourModKit_tests.exe | |
| 85 | + Select-Object -First 1).FullName |
| 86 | + if (-not $exe) { throw "DetourModKit_tests.exe not found" } |
| 87 | +
|
| 88 | + $out = & "$sdeExe" "-${{ matrix.chip }}" -- "$exe" --gtest_filter="ScannerTest.*" |
| 89 | + $rc = $LASTEXITCODE |
| 90 | + $out | ForEach-Object { Write-Host $_ } |
| 91 | +
|
| 92 | + # Assert the emulated CPU actually selected this leg's tier, so a chip that silently picks a different verify |
| 93 | + # body cannot pass as coverage for the tier this leg is meant to cover. |
| 94 | + $level = $out | Select-String 'Scanner SIMD level:\s*(\S+)' | Select-Object -First 1 |
| 95 | + if ($level) |
| 96 | + { |
| 97 | + $observed = $level.Matches[0].Groups[1].Value |
| 98 | + Write-Host "Observed tier under -${{ matrix.chip }}: $observed" |
| 99 | + if ($observed -ne "${{ matrix.tier }}") |
| 100 | + { |
| 101 | + throw "Expected ${{ matrix.tier }} under -${{ matrix.chip }} but the scanner selected $observed" |
| 102 | + } |
| 103 | + } |
| 104 | + if ($rc -ne 0) { throw "ScannerTest failed under -${{ matrix.chip }} (${{ matrix.tier }})" } |
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