CRC Error when writing to flash on Tang Nano 1k

[ScrewDriven05]

Good day! I'm an absolute beginner when it comes to FPGAs and I've been working on this for over 15 hours. Please excuse any typos or missing information.
I suddenly started seeing CRC Errors while trying to load my verilog program to a Tang Nano 1k with openFPGALoader specifically to flash. SRAM uploads don't cause errors but also don't change the behaviour of my board.

openFPGALoader -b tangnano1k -f -v end.fs 
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
found 1 devices
index 0:
	idcode 0x100681b
	manufacturer Gowin
	family GW1NZ
	model  GW1NZ-1
	irlength 8
File type : fs
Parse file Parse end.fs: 
checksum 0xc2b8
Done
DONE
bitstream header infos
CRCCheck: ON
Compress: OFF
ConfDataLength: 274
LoadingRate: 4629629
ProgramDoneBypass: OFF
SPIAddr: 00000000
SecurityBit: ON
idcode: 0100681b
Jtag frequency : requested 2.50MHz    -> real 2.00MHz   
Erase SRAM before erase sram: displayReadReg 00017460
	Memory Erase
	Preamble
	Non-JTAG configuration is active
	Gowin VLD
	Done Final
	Security Final
	POR
pollFlag: 1f0a0 (80)
pollFlag: 1d080 (0)
pollFlag: 190a0 (20)
after erase sram: displayReadReg 000190a0
	Memory Erase
	System Edit Mode
	Gowin VLD
	Ready
	POR
pollFlag: 11020 (0)
after erase sram: displayReadReg 00011020
	Memory Erase
	Gowin VLD
	POR
DONE
pollFlag: 190a0 (80)
Erase FLASH before erase flash: displayReadReg 000190a0
	Memory Erase
	System Edit Mode
	Gowin VLD
	Ready
	POR
pollFlag: 190a0 (80)
pollFlag: 11020 (0)
after erase flash: displayReadReg 00011020
	Memory Erase
	Gowin VLD
	POR
DONE
Erasing FLASH: [==================================================] 100.00%
Done
pollFlag: 11020 (0)
write Flash: [==================================================] 100.00%
Done
pollFlag: 11020 (0)
CRC check : FAIL
Read: 0x00000000 checksum: 0xc2b8

after program flash: displayReadReg 00011020
	Memory Erase
	Gowin VLD
	POR

[yrabbit]

I'm not an expert on the loader, but I just wanted to point out how the Tangnano1k flash is loaded on my device. The difference is in the line

Non-JTAG configuration is active

and I'm curious how this can be achieved :)

rabbit@thorn ~/src/apicula/examples% openFPGALoader -V
openFPGALoader v1.0.0
rabbit@thorn ~/src/apicula/examples% openFPGALoader -b tangnano1k -f -v blinky-tangnano1k.fs
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz
found 1 devices
index 0:
        idcode 0x100681b
        manufacturer Gowin
        family GW1NZ
        model  GW1NZ-1
        irlength 8
File type : fs
Parse file Parse blinky-tangnano1k.fs:
checksum 0xd179
Done
DONE
bitstream header infos
CRCCheck: ON
Compress: OFF
ConfDataLength: 274
LoadingRate: 4629629
ProgramDoneBypass: OFF
SPIAddr: 00000000
SecurityBit: ON
idcode: 0100681b
Jtag frequency : requested 2.50MHz    -> real 2.00MHz
Erase SRAM before erase sram: displayReadReg 0001f020
        Memory Erase
        Gowin VLD
        Done Final
        Security Final
        Ready
        POR
pollFlag: 1f0a0 (80)
pollFlag: 1d080 (0)
pollFlag: 190a0 (20)
after erase sram: displayReadReg 000190a0
        Memory Erase
        System Edit Mode
        Gowin VLD
        Ready
        POR
pollFlag: 19020 (0)
after erase sram: displayReadReg 00019020
        Memory Erase
        Gowin VLD
        Ready
        POR
DONE
pollFlag: 190a0 (80)
Erase FLASH before erase flash: displayReadReg 000190a0
        Memory Erase
        System Edit Mode
        Gowin VLD
        Ready
        POR
pollFlag: 190a0 (80)
pollFlag: 19020 (0)
after erase flash: displayReadReg 00019020
        Memory Erase
        Gowin VLD
        Ready
        POR
DONE
Erasing FLASH: [==================================================] 100.00%
Done
pollFlag: 19020 (0)
write Flash: [==================================================] 100.00%
Done
pollFlag: 19020 (0)
CRC check: Success
after program flash: displayReadReg 0001f020
        Memory Erase
        Gowin VLD
        Done Final
        Security Final
        Ready
        POR

[ScrewDriven05]

Interesting, are you also using a usb-c cable?

[yrabbit]

yep. No fancy programmers (gowin or other).

[yrabbit]

By the way, here are all the examples (compiled). You can try flashing the blinky like I did—then it'll be clear whether the loader is to blame or if your bitstream is a bit unusual :)

https://github.com/YosysHQ/apicula/actions/runs/24506634446/artifacts/6471833344

[trabucayre]

Thanks @yrabbit
Sorry for delay I have received the board today and I am perfectly able to load/flash bitstream with examples mentioned by @yrabbit .
Could you check the firmware of the FTDI clone? and update it as explained here?