kernel: add SMP foundation with per-CPU runqueues and affinity

- Percpu state, klocks, and ENABLE_SMP config across arches
- Affinity scheduling, lazy secondary ctx, and IPI deferred resched
- SMP-safe IPC/notif unlock order; TriCore/RISC-V secondary bring-up

Author: uLipe

.gitignore

@@ -58,3 +58,4 @@ build-riscv/
 
 # SDK suite object leftovers
 tests/sdk_suite/**/*.o
+.hil_tmp/

CMakeLists.txt

@@ -78,6 +78,7 @@ execute_process(
         --set "ULMK_CONFIG_MAX_IRQ_BINDINGS=${ULMK_CONFIG_MAX_IRQ_BINDINGS}"
         --set "ULMK_CONFIG_DEBUG_PRINTK=${ULMK_CONFIG_DEBUG_PRINTK}"
         --set "ULMK_CONFIG_SYSCALL_WCET=${ULMK_CONFIG_SYSCALL_WCET}"
+        --set "ULMK_CONFIG_ENABLE_SMP=${ULMK_CONFIG_ENABLE_SMP}"
     RESULT_VARIABLE _ulmk_gen_rc)
 if(NOT _ulmk_gen_rc EQUAL 0)
     message(FATAL_ERROR "gen_config.py failed (rc=${_ulmk_gen_rc})")
@@ -97,6 +98,8 @@ add_library(ulmk_kernel STATIC
     kernel/syscall/syscall_router.c
     kernel/printk/ulmk_printk.c
     kernel/thread/thread.c
+    kernel/percpu/percpu.c
+    kernel/percpu/klock.c
     kernel/sched/sched.c
     kernel/sched/fifo_rt.c
     kernel/sched/bitmap_rt.c

arch/arm/arch.c

@@ -503,3 +503,87 @@ void ulmk_arch_init(ulmk_boot_info_t *info)
 	ulmk_arch_irq_vectors_init(0u, 0u, 0u);
 	/* SysTick is armed lazily on the first context switch (see sched_switch). */
 }
+
+/* =========================================================================
+ * SMP — not supported on Cortex-M; stubs keep the arch API complete
+ * ========================================================================= */
+
+uint32_t ulmk_arch_cpu_id(void)
+{
+	return 0u;
+}
+
+void ulmk_arch_spin_lock(ulmk_spinlock_t *lock)
+{
+#if ULMK_CONFIG_ENABLE_SMP
+	while (ulmk_arch_atomic_cas(&lock->locked, 0u, 1u) != 0u)
+		;
+#else
+	(void)lock;
+#endif
+}
+
+void ulmk_arch_spin_unlock(ulmk_spinlock_t *lock)
+{
+#if ULMK_CONFIG_ENABLE_SMP
+	lock->locked = 0u;
+#else
+	(void)lock;
+#endif
+}
+
+ulmk_arch_irq_key_t ulmk_arch_spin_lock_irqsave(ulmk_spinlock_t *lock)
+{
+	ulmk_arch_irq_key_t key = ulmk_arch_cpu_irq_save();
+
+	ulmk_arch_spin_lock(lock);
+	return key;
+}
+
+void ulmk_arch_spin_unlock_irqrestore(ulmk_spinlock_t *lock,
+				      ulmk_arch_irq_key_t key)
+{
+	ulmk_arch_spin_unlock(lock);
+	ulmk_arch_cpu_irq_restore(key);
+}
+
+void ulmk_arch_send_ipi(uint32_t cpu_id)
+{
+	(void)cpu_id;
+}
+
+void ulmk_arch_ipi_note_enter(void)
+{
+}
+
+void ulmk_arch_ipi_clear_self(void)
+{
+}
+
+void ulmk_arch_ipi_pulse_self(void)
+{
+}
+
+void ulmk_arch_secondary_init(void)
+{
+}
+
+void ulmk_arch_secondary_mark_ready(void)
+{
+}
+
+void ulmk_arch_start_secondary(uint32_t cpu_id, void (*entry)(void))
+{
+	(void)cpu_id;
+	(void)entry;
+}
+
+void ulmk_arch_smp_park(void)
+{
+	for (;;)
+		ulmk_arch_cpu_halt();
+}
+
+void ulmk_arch_smp_mark_ready(void)
+{
+}

arch/arm/include/arch_config.h

@@ -18,6 +18,10 @@
 
 #include <ulmk/platform.h>
 
+#ifndef ULMK_ARCH_NUM_CPU
+#define ULMK_ARCH_NUM_CPU	1
+#endif
+
 /* Sub-profile: 0 = ARMv7-M, 1 = ARMv8-M mainline (board overrides). */
 #ifndef ULMK_ARCH_ARMV8M
 #define ULMK_ARCH_ARMV8M	0

arch/arm/include/ulmk_arch.h

@@ -56,13 +56,36 @@ typedef struct {
 #define ULMK_REGION_PERIPH	4
 #define ULMK_REGION_SHARED	5
 
+typedef struct {
+	volatile uint32_t locked;
+} ulmk_spinlock_t;
+
+#define ULMK_SPINLOCK_INIT	{ 0u }
+
 ulmk_arch_irq_key_t ulmk_arch_cpu_irq_save(void);
 void              ulmk_arch_cpu_irq_restore(ulmk_arch_irq_key_t key);
 void              ulmk_arch_cpu_irq_enable(void);
 void              ulmk_arch_cpu_irq_disable(void);
 void              ulmk_arch_cpu_idle(void);
 void              ulmk_arch_cpu_halt(void);
 uint32_t          ulmk_arch_cpu_clz(uint32_t val);
+uint32_t          ulmk_arch_cpu_id(void);
+
+void              ulmk_arch_spin_lock(ulmk_spinlock_t *lock);
+void              ulmk_arch_spin_unlock(ulmk_spinlock_t *lock);
+ulmk_arch_irq_key_t ulmk_arch_spin_lock_irqsave(ulmk_spinlock_t *lock);
+void              ulmk_arch_spin_unlock_irqrestore(ulmk_spinlock_t *lock,
+						    ulmk_arch_irq_key_t key);
+
+void              ulmk_arch_send_ipi(uint32_t cpu_id);
+void              ulmk_arch_ipi_clear_self(void);
+void              ulmk_arch_ipi_note_enter(void);
+void              ulmk_arch_ipi_pulse_self(void);
+void              ulmk_arch_secondary_init(void);
+void              ulmk_arch_secondary_mark_ready(void);
+void              ulmk_arch_start_secondary(uint32_t cpu_id, void (*entry)(void));
+void              ulmk_arch_smp_mark_ready(void);
+void              ulmk_arch_smp_park(void);
 
 void     ulmk_arch_cycle_enable(void);
 uint32_t ulmk_arch_cycle_read(void);
@@ -130,7 +153,9 @@ void ulmk_arch_trap_dump(uint8_t trap_class, uint8_t tin);
 void ulmk_printk_char_out(char c);
 
 void ulmk_kern_irq_dispatch(uint8_t srpn);
+void ulmk_kern_ipi_resched(void);
 void ulmk_kern_sched_dispatch(bool from_isr);
+void ulmk_kern_secondary_main(void);
 uint32_t ulmk_kern_syscall_ret_resolve(uint32_t ret);
 uint32_t ulmk_kern_trap_syscall(uint8_t tin, uint32_t args[4]);
 void ulmk_kern_trap_recoverable(void);

arch/riscv/arch.c

@@ -42,7 +42,8 @@ struct riscv_trap_frame {
 	uint32_t regs[TF_SIZE / 4u];
 };
 
-uintptr_t g_trap_sp;
+/* Indexed by mhartid — trap.S stores the frame pointer per hart. */
+uintptr_t g_trap_sp[ULMK_ARCH_NUM_CPU];
 
 static inline uint32_t read_mstatus(void)
 {
@@ -478,10 +479,23 @@ void ulmk_arch_mpu_configure(uint8_t prs, const ulmk_arch_region_t *regions,
 	(void)count;
 }
 
-static const ulmk_arch_region_t *g_pmp_regions;
-static uint8_t g_pmp_count;
-static uint8_t g_pmp_prs = 0xFFu;
-static uint8_t g_pmp_dyn; /* non-STACK dynamic slots last programmed */
+/*
+ * PMP CSRs are per-hart.  The "last programmed" cache must not be global or
+ * one CPU's switch causes another's mpu_switch to skip a real rewrite.
+ */
+struct pmp_cpu_cache {
+	const ulmk_arch_region_t *regions;
+	uint8_t count;
+	uint8_t prs;
+	uint8_t dyn;
+};
+
+static struct pmp_cpu_cache g_pmp_cache[ULMK_ARCH_NUM_CPU] = {
+	[0] = { .prs = 0xFFu },
+#if ULMK_ARCH_NUM_CPU > 1
+	[1] = { .prs = 0xFFu },
+#endif
+};
 
 static uint8_t pmp_dyn_count(const ulmk_arch_region_t *regions, uint8_t count)
 {
@@ -500,30 +514,44 @@ static uint8_t pmp_dyn_count(const ulmk_arch_region_t *regions, uint8_t count)
 void ulmk_arch_mpu_switch(const ulmk_arch_region_t *regions, uint8_t count,
 			uint8_t prs)
 {
-	uint8_t eff;
+	struct pmp_cpu_cache *c;
+	uint32_t              cpu;
+	uint8_t               eff;
 
-	if (prs == g_pmp_prs && regions == g_pmp_regions && count == g_pmp_count)
+	cpu = ulmk_arch_cpu_id();
+	if (cpu >= (uint32_t)ULMK_ARCH_NUM_CPU)
+		cpu = 0u;
+	c = &g_pmp_cache[cpu];
+
+	/*
+	 * On SMP only skip when this hart already has the exact same layout.
+	 * The stack-only fast path was UP-friendly but races badly when another
+	 * hart's view of "already programmed" is assumed.
+	 */
+	if (prs == c->prs && regions == c->regions && count == c->count)
 		return;
 
 	eff = (prs == ULMK_ARCH_PRS_KERNEL) ? 0u : pmp_dyn_count(regions, count);
 
+#if !ULMK_CONFIG_ENABLE_SMP
 	/* Stack-only AS: static URAM covers stacks — skip full PMP rewrite. */
-	if (prs == g_pmp_prs && eff == 0u && g_pmp_dyn == 0u &&
+	if (prs == c->prs && eff == 0u && c->dyn == 0u &&
 	    prs != ULMK_ARCH_PRS_KERNEL) {
-		g_pmp_regions = regions;
-		g_pmp_count   = count;
+		c->regions = regions;
+		c->count   = count;
 		return;
 	}
+#endif
 
 	if (prs == ULMK_ARCH_PRS_KERNEL)
 		pmp_kernel_layout();
 	else
 		pmp_user_layout(regions, count);
 
-	g_pmp_prs     = prs;
-	g_pmp_regions = regions;
-	g_pmp_count   = count;
-	g_pmp_dyn     = eff;
+	c->prs     = prs;
+	c->regions = regions;
+	c->count   = count;
+	c->dyn     = eff;
 }
 
 bool ulmk_arch_mpu_addr_permitted(uintptr_t addr, size_t size, uint32_t perms)
@@ -717,5 +745,9 @@ void ulmk_arch_init(ulmk_boot_info_t *info)
 
 	ulmk_arch_irq_vectors_init((uintptr_t)_trap_handler, 0u, 0u);
 	ulmk_arch_mpu_init();
+#if ULMK_CONFIG_ENABLE_SMP
+	/* Accept CLINT MSIP reschedule IPIs on every hart. */
+	__asm__ volatile("csrs mie, %0" :: "r"(1u << 3));
+#endif
 	(void)user_mstatus_init;
 }

arch/riscv/include/arch_config.h

@@ -12,6 +12,10 @@
 
 #include <ulmk/platform.h>
 
+#ifndef ULMK_ARCH_NUM_CPU
+#define ULMK_ARCH_NUM_CPU	1
+#endif
+
 #ifndef ULMK_ARCH_HAVE_FPU
 #define ULMK_ARCH_HAVE_FPU	0
 #endif

arch/riscv/include/ulmk_arch.h

@@ -19,6 +19,12 @@ typedef struct {
 
 typedef uint32_t ulmk_arch_irq_key_t;
 
+typedef struct {
+	volatile uint32_t locked;
+} ulmk_spinlock_t;
+
+#define ULMK_SPINLOCK_INIT	{ 0u }
+
 typedef struct {
 	uintptr_t base;
 	size_t    size;
@@ -40,6 +46,23 @@ void              ulmk_arch_cpu_irq_disable(void);
 void              ulmk_arch_cpu_idle(void);
 void              ulmk_arch_cpu_halt(void);
 uint32_t          ulmk_arch_cpu_clz(uint32_t val);
+uint32_t          ulmk_arch_cpu_id(void);
+
+void              ulmk_arch_spin_lock(ulmk_spinlock_t *lock);
+void              ulmk_arch_spin_unlock(ulmk_spinlock_t *lock);
+ulmk_arch_irq_key_t ulmk_arch_spin_lock_irqsave(ulmk_spinlock_t *lock);
+void              ulmk_arch_spin_unlock_irqrestore(ulmk_spinlock_t *lock,
+						    ulmk_arch_irq_key_t key);
+
+void              ulmk_arch_send_ipi(uint32_t cpu_id);
+void              ulmk_arch_ipi_clear_self(void);
+void              ulmk_arch_ipi_note_enter(void);
+void              ulmk_arch_ipi_pulse_self(void);
+void              ulmk_arch_secondary_init(void);
+void              ulmk_arch_secondary_mark_ready(void);
+void              ulmk_arch_start_secondary(uint32_t cpu_id, void (*entry)(void));
+void              ulmk_arch_smp_mark_ready(void);
+void              ulmk_arch_smp_park(void);
 
 void     ulmk_arch_cycle_enable(void);
 uint32_t ulmk_arch_cycle_read(void);
@@ -107,7 +130,9 @@ void ulmk_arch_trap_dump(uint8_t trap_class, uint8_t tin);
 void ulmk_printk_char_out(char c);
 
 void ulmk_kern_irq_dispatch(uint8_t srpn);
+void ulmk_kern_ipi_resched(void);
 void ulmk_kern_sched_dispatch(bool from_isr);
+void ulmk_kern_secondary_main(void);
 uint32_t ulmk_kern_syscall_ret_resolve(uint32_t ret);
 uint32_t ulmk_kern_trap_syscall(uint8_t tin, uint32_t args[4]);
 void ulmk_kern_trap_recoverable(void);

arch/riscv/irq_clint.c

@@ -8,6 +8,7 @@
 
 #include <stdint.h>
 #include <ulmk/microkernel.h>
+#include <ulmk/config.h>
 #include <ulmk_arch.h>
 #include <arch_config.h>
 #include "irq_internal.h"
@@ -97,6 +98,17 @@ void riscv_clint_dispatch(uint32_t mcause)
 	is_soft  = mcause == MCAUSE_MSOFT;
 	is_timer = mcause == MCAUSE_MTIMER;
 
+#if ULMK_CONFIG_ENABLE_SMP
+	/*
+	 * Reschedule IPI: clear this hart's MSIP; kernel marks needs_resched.
+	 * Bound SRPN soft IRQs (tests) still run below.
+	 */
+	if (is_soft) {
+		ulmk_arch_ipi_clear_self();
+		ulmk_kern_ipi_resched();
+	}
+#endif
+
 	for (srpn = 1u; srpn < 256u; srpn++) {
 		if (g_src_type[srpn] != IRQ_SRC_CLINT)
 			continue;