kernel: add optional syscall WCET cycle instrumentation

- Opt-in via ULMK_CONFIG_SYSCALL_WCET; publish deltas in a user-visible slot
- Arch cycle counters: TriCore CCNT, RISC-V mcycle, ARM DWT CYCCNT

Author: uLipe

CMakeLists.txt

@@ -77,6 +77,7 @@ execute_process(
         --board-config "${ULMK_CHIP_DIR}/board_config.h"
         --set "ULMK_CONFIG_MAX_IRQ_BINDINGS=${ULMK_CONFIG_MAX_IRQ_BINDINGS}"
         --set "ULMK_CONFIG_DEBUG_PRINTK=${ULMK_CONFIG_DEBUG_PRINTK}"
+        --set "ULMK_CONFIG_SYSCALL_WCET=${ULMK_CONFIG_SYSCALL_WCET}"
     RESULT_VARIABLE _ulmk_gen_rc)
 if(NOT _ulmk_gen_rc EQUAL 0)
     message(FATAL_ERROR "gen_config.py failed (rc=${_ulmk_gen_rc})")
@@ -104,6 +105,7 @@ add_library(ulmk_kernel STATIC
     kernel/mem/mem.c
     kernel/mem/tlsf.c
     kernel/irq/irq.c
+    kernel/syscall/syscall_wcet.c
     ${ULMK_ARCH_KERNEL_SOURCES})
 
 if(EXISTS "${ULMK_CHIP_DIR}/qemu_printk_hook.c")

arch/arm/arch.c

@@ -89,6 +89,35 @@ uint32_t ulmk_arch_cpu_clz(uint32_t val)
 	return (uint32_t)__builtin_clz(val);
 }
 
+#if ULMK_CONFIG_SYSCALL_WCET
+#define DEMCR		0xE000EDFCu
+#define DWT_CTRL	0xE0001000u
+#define DWT_CYCCNT	0xE0001004u
+#define DEMCR_TRCENA	(1u << 24)
+#define DWT_CYCCNTENA	(1u << 0)
+
+void ulmk_arch_cycle_enable(void)
+{
+	REG32(DEMCR) |= DEMCR_TRCENA;
+	REG32(DWT_CYCCNT) = 0u;
+	REG32(DWT_CTRL) |= DWT_CYCCNTENA;
+}
+
+uint32_t ulmk_arch_cycle_read(void)
+{
+	return REG32(DWT_CYCCNT);
+}
+#else
+void ulmk_arch_cycle_enable(void)
+{
+}
+
+uint32_t ulmk_arch_cycle_read(void)
+{
+	return 0u;
+}
+#endif
+
 /* =========================================================================
  * Context management
  * ========================================================================= */
@@ -289,6 +318,11 @@ void ulmk_arch_trap_dump(uint8_t trap_class, uint8_t tin)
 
 void ulmk_arch_trap_entry(uint8_t trap_class, uint8_t tin)
 {
+	/*
+	 * HardFault / unexpected paths: policy is panic.  MemManage / Bus /
+	 * Usage from Thread+PSP are recovered in _arm_fault_dispatch before
+	 * reaching here (kill via ulmk_user_thread_entry / thread_exit).
+	 */
 	dump_puts("TRAP class=");
 	dump_hex8((uint32_t)trap_class);
 	dump_puts(" exc=");

arch/arm/include/ulmk_arch.h

@@ -66,6 +66,9 @@ void              ulmk_arch_cpu_idle(void);
 void              ulmk_arch_cpu_halt(void);
 uint32_t          ulmk_arch_cpu_clz(uint32_t val);
 
+void     ulmk_arch_cycle_enable(void);
+uint32_t ulmk_arch_cycle_read(void);
+
 void ulmk_arch_csa_pool_init(uintptr_t pool_base, size_t pool_size);
 
 void ulmk_arch_ctx_init(ulmk_arch_ctx_t *ctx,

arch/riscv/arch.c

@@ -7,6 +7,7 @@
 #include <stddef.h>
 #include <stdbool.h>
 #include <ulmk/microkernel.h>
+#include <ulmk/config.h>
 #include <ulmk_arch.h>
 #include "irq_internal.h"
 
@@ -240,6 +241,30 @@ uint32_t ulmk_arch_cpu_clz(uint32_t val)
 	return (uint32_t)__builtin_clz(val);
 }
 
+#if ULMK_CONFIG_SYSCALL_WCET
+void ulmk_arch_cycle_enable(void)
+{
+	/* mcycle is free-running from reset; nothing to unlock in M-mode. */
+}
+
+uint32_t ulmk_arch_cycle_read(void)
+{
+	uint32_t v;
+
+	__asm__ volatile("csrr %0, mcycle" : "=r"(v));
+	return v;
+}
+#else
+void ulmk_arch_cycle_enable(void)
+{
+}
+
+uint32_t ulmk_arch_cycle_read(void)
+{
+	return 0u;
+}
+#endif
+
 /* =========================================================================
  * Context management
  * ========================================================================= */

arch/riscv/include/ulmk_arch.h

@@ -41,6 +41,9 @@ void              ulmk_arch_cpu_idle(void);
 void              ulmk_arch_cpu_halt(void);
 uint32_t          ulmk_arch_cpu_clz(uint32_t val);
 
+void     ulmk_arch_cycle_enable(void);
+uint32_t ulmk_arch_cycle_read(void);
+
 void ulmk_arch_csa_pool_init(uintptr_t pool_base, size_t pool_size);
 
 void ulmk_arch_ctx_init(ulmk_arch_ctx_t *ctx,

arch/tricore/arch.c

@@ -71,6 +71,38 @@ uint32_t ulmk_arch_cpu_clz(uint32_t val)
 	return result;
 }
 
+#if ULMK_CONFIG_SYSCALL_WCET
+/* CCTRL: CM=bit0, CE=bit1 (TC1.6 Vol1 §12.11). Normal free-run: CE=1. */
+#define CCTRL_CE	(1u << 1)
+
+void ulmk_arch_cycle_enable(void)
+{
+	uint32_t cctrl;
+
+	__asm__ volatile("mfcr %0, 0xFC00" : "=d"(cctrl));
+	cctrl |= CCTRL_CE;
+	__asm__ volatile("mtcr 0xFC00, %0" :: "d"(cctrl));
+	__asm__ volatile("isync" ::: "memory");
+}
+
+uint32_t ulmk_arch_cycle_read(void)
+{
+	uint32_t v;
+
+	__asm__ volatile("mfcr %0, 0xFC04" : "=d"(v));
+	return v;
+}
+#else
+void ulmk_arch_cycle_enable(void)
+{
+}
+
+uint32_t ulmk_arch_cycle_read(void)
+{
+	return 0u;
+}
+#endif
+
 /* =========================================================================
  * CSA helpers — used by context init only; not part of the public API.
  *

arch/tricore/include/ulmk_arch.h

@@ -72,6 +72,9 @@ void              ulmk_arch_cpu_idle(void);
 void              ulmk_arch_cpu_halt(void);
 uint32_t          ulmk_arch_cpu_clz(uint32_t val);
 
+void     ulmk_arch_cycle_enable(void);
+uint32_t ulmk_arch_cycle_read(void);
+
 /* =========================================================================
  * Context management (arch_api_spec.md §6)
  * ========================================================================= */

cmake/config.cmake

@@ -6,3 +6,5 @@
 
 set(ULMK_CONFIG_MAX_IRQ_BINDINGS 16 CACHE STRING "Max IRQ-to-notification bindings")
 set(ULMK_CONFIG_DEBUG_PRINTK     1  CACHE STRING "Enable kernel printk (0 = production no-op)")
+set(ULMK_CONFIG_SYSCALL_WCET     0  CACHE STRING
+	"Syscall cycle-counter slot (0=off, 1=WCET HIL / silicon_wcet)")

include/ulmk/syscall_wcet.h

@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Syscall WCET slot — filled by the kernel when ULMK_CONFIG_SYSCALL_WCET=1.
+ *
+ * Lives in .user_bss so driver threads may read it without mem_map.
+ * After each syscall the kernel updates nr/delta/begin/end and increments seq.
+ */
+
+#ifndef ULMK_SYSCALL_WCET_H
+#define ULMK_SYSCALL_WCET_H
+
+#include <stdint.h>
+
+#define ULMK_SYSCALL_WCET_MAGIC	0x57434554u	/* 'WCET' */
+
+struct ulmk_syscall_wcet_slot {
+	uint32_t magic;
+	uint32_t seq;
+	uint32_t nr;
+	uint32_t delta;
+	uint32_t begin;
+	uint32_t end;
+};
+
+extern volatile struct ulmk_syscall_wcet_slot g_ulmk_syscall_wcet;
+
+#endif /* ULMK_SYSCALL_WCET_H */

kernel/kernel_main.c

@@ -10,6 +10,7 @@
 #include <stdint.h>
 #include <ulmk/microkernel.h>
 #include <ulmk/config.h>
+#include <ulmk/syscall_wcet.h>
 #include <ulmk_arch.h>
 #include <kernel/include/ulmk_sched.h>
 #include <kernel/include/ulmk_thread_internal.h>
@@ -44,7 +45,25 @@ void ulmk_kern_trap_mpu_restore(void)
 
 uint32_t ulmk_kern_trap_syscall(uint8_t tin, uint32_t args[4])
 {
+#if ULMK_CONFIG_SYSCALL_WCET
+	uint32_t begin;
+	uint32_t end;
+	uint32_t ret;
+
+	begin = ulmk_arch_cycle_read();
+	ret   = ulmk_syscall_router(tin, args[0], args[1], args[2], args[3]);
+	end   = ulmk_arch_cycle_read();
+
+	g_ulmk_syscall_wcet.magic = ULMK_SYSCALL_WCET_MAGIC;
+	g_ulmk_syscall_wcet.nr    = tin;
+	g_ulmk_syscall_wcet.begin = begin;
+	g_ulmk_syscall_wcet.end   = end;
+	g_ulmk_syscall_wcet.delta = end - begin;
+	g_ulmk_syscall_wcet.seq++;
+	return ret;
+#else
 	return ulmk_syscall_router(tin, args[0], args[1], args[2], args[3]);
+#endif
 }
 
 void ulmk_kern_trap_recoverable(void)
@@ -124,6 +143,12 @@ void ulmk_kern_main(const ulmk_boot_info_t *info)
 	ulmk_irq_table_init();
 	UL_LOG_DBG("irq table init done");
 
+#if ULMK_CONFIG_SYSCALL_WCET
+	ulmk_arch_cycle_enable();
+	g_ulmk_syscall_wcet.magic = ULMK_SYSCALL_WCET_MAGIC;
+	g_ulmk_syscall_wcet.seq   = 0u;
+#endif
+
 	ulmk_arch_mpu_init();
 	ulmk_arch_cpu_irq_enable();