arch/tricore: early WDT hook, clear PSW.IS, board EndInit API

- Call board_wdt_disable_early before CSA init (standalone timeout)
- Force PSW.IS=0 so bring-up never nests on a bad ISP
- Declare ulmk_board_cpu_endinit_{clear,set} for EndInit CSFRs

Author: uLipe

arch/tricore/board_wdt_early_stub.S

@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Weak no-op — boards override with board_wdt_early.S (ji %a11 return).
+ */
+
+	.section .text.board_wdt_early, "ax"
+	.weak   ulmk_board_wdt_disable_early
+	.type   ulmk_board_wdt_disable_early, @function
+ulmk_board_wdt_disable_early:
+	ji      %a11
+	.size   ulmk_board_wdt_disable_early, . - ulmk_board_wdt_disable_early

arch/tricore/include/ulmk_arch.h

@@ -203,6 +203,18 @@ void ulmk_kern_start(void);
  */
 void ulmk_board_init(void);
 
+/*
+ * CPU EndInit unlock/relock for EndInit-protected CSFRs (BTV, BIV, ISP,
+ * SYSCON.PROTEN, …).  Board provides a strong implementation (WDT password
+ * sequence).  Weak no-ops in arch cover QEMU / boards without EndInit.
+ *
+ * OpenOCD's CBS_OCNTRL unlock makes these writes succeed without EndInit on
+ * the flash path; button/PORST do not — without these hooks BTV/ISP stay at
+ * reset defaults and the first SYSCALL class-4 traps (red ESR0).
+ */
+void ulmk_board_cpu_endinit_clear(void);
+void ulmk_board_cpu_endinit_set(void);
+
 /*
  * ulmk_arch_init - one-time CPU and peripheral initialisation
  * Called by ulmk_kern_start() after ulmk_board_init() and after .data/.bss

arch/tricore/startup.S

@@ -21,6 +21,7 @@
     .extern _small_data3_
     .extern _small_data4_
     .extern ulmk_kern_start
+    .extern ulmk_board_wdt_disable_early
 
     .section .text._start, "ax"
     .global _start
@@ -29,9 +30,34 @@ _start:
     /* 0. Interrupts off until the kernel unlocks them. */
     disable
 
-    /* 1. Supervisor stack */
+    /*
+     * Board hook: disable CPU0 + Safety WDT before CSA construction.
+     * Default timeout can expire during the CSA loop on standalone reset
+     * (OpenOCD reset-end pokes WDT only under OCDS).  Weak stub is ji %a11.
+     * No CALL (CSA not ready).  ji needs a register operand; local .L labels
+     * have no hi/lo reloc — use a global continue label.
+     */
+    movh.a  %a11, hi:_start_after_wdt
+    lea     %a11, [%a11] lo:_start_after_wdt
+    movh.a  %a2, hi:ulmk_board_wdt_disable_early
+    lea     %a2, [%a2] lo:ulmk_board_wdt_disable_early
+    ji      %a2
+    .global _start_after_wdt
+_start_after_wdt:
+
+    /* 1. Supervisor stack + clear PSW.IS
+     *
+     * SSW / cold reset may leave PSW.IS=1.  board_init runs before arch_init
+     * programs ISP; an early class-4 with IS=1 then nests on a bad ISP and
+     * cascades.  Force IS=0 so A10 is the task/kernel stack throughout bring-up.
+     */
     movh.a  %a10, hi:_ulmk_kernel_stack_top
     lea     %a10, [%a10] lo:_ulmk_kernel_stack_top
+    mfcr    %d0, 0xFE04
+    mov     %d1, 0x200			/* PSW.IS */
+    andn    %d0, %d0, %d1
+    mtcr    0xFE04, %d0
+    isync
 
     /* 2. CSA free list construction.
      *

cmake/arch_sources.cmake

@@ -7,6 +7,7 @@ if(ULMK_ARCH STREQUAL "tricore")
 		${ULMK_ARCH_DIR}/ctx_switch.S)
 	set(ULMK_ARCH_EXE_SOURCES
 		${ULMK_ARCH_DIR}/startup.S
+		${ULMK_ARCH_DIR}/board_wdt_early_stub.S
 		${ULMK_ARCH_DIR}/secondary.S
 		${ULMK_ARCH_DIR}/vectors.S)
 elseif(ULMK_ARCH STREQUAL "riscv")