11# NXP T2080 wolfBoot Configuration
22# Default board: T2080 RDB (66.66 MHz oscillator, DDR3L SODIMM)
33#
4- # Board selection: uncomment exactly one line to override the default.
5- # Default (no define): T2080 RDB (66.66 MHz oscillator, DDR3L SODIMM)
6- # BOARD_CW_VPX3152 : CW VPX3-152 (66.667 MHz oscillator, DDR3L )
7- # BOARD_NAII_68PPC2 : NAII 68PPC2 (100 MHz oscillator, 8GB DDR3 )
4+ # Board selection:
5+ # Default (no define): T2080 RDB (66.66 MHz oscillator, DDR3L SODIMM)
6+ # BOARD_NAII_68PPC2 : NAII 68PPC2 (100 MHz oscillator, 8 GB DDR3 )
7+ # BOARD_CW_VPX3152 : CW VPX3-152 (66.667 MHz oscillator, 4 GB DDR3L )
88#
9- #CFLAGS_EXTRA+=-DBOARD_CW_VPX3152
9+ # For NAII 68PPC2, uncomment the line below (addresses are the same as RDB):
1010#CFLAGS_EXTRA+=-DBOARD_NAII_68PPC2
11+ #
12+ # For CW VPX3-152 (256 MB NOR flash at 0xF0000000), uncomment the BOARD
13+ # define below AND the entire address-override block at the bottom of this
14+ # file. That block includes OS_64BIT=1, which is REQUIRED to boot a 64-bit
15+ # RTOS (VxWorks 7 / Green Hills INTEGRITY-178 tuMP) -- it gates the e6500 SMP
16+ # spin-table + DDR-LAW handoff in hal/nxp_t2080.c; without it the loader runs
17+ # but the OS hangs silently right after "do_boot: jumping".
18+ #CFLAGS_EXTRA+=-DBOARD_CW_VPX3152
1119
1220ARCH=PPC
1321TARGET=nxp_t2080
@@ -34,51 +42,82 @@ RAM_CODE?=1
3442DUALBANK_SWAP?=0
3543WOLFTPM?=0
3644OPTIMIZATION_LEVEL?=1
45+ ELF?=1
46+ DEBUG_ELF=0
3747
38- # NOR Base Address
39- # T2080 RDB: 128MB flash at 0xE8000000, wolfBoot at top (0xEFFE0000)
40- # CW VPX3-152: 256MB flash at 0xF0000000, wolfBoot at top (0xFFFE0000)
48+ # -----------------------------------------------------------------------------
49+ # Default addresses: T2080 RDB / NAII 68PPC2 (128 MB NOR flash @ 0xE8000000)
50+ # -----------------------------------------------------------------------------
51+
52+ # NOR Base Address: wolfBoot at top of flash
4153ARCH_FLASH_OFFSET?=0xEFFE0000
42- #ARCH_FLASH_OFFSET?=0xFFFE0000 # CW VPX3-152
4354
4455# CPC SRAM address (must match L2SRAM_ADDR in nxp_ppc.h)
45- # CW VPX3-152: relocated to 0xEE900000 to avoid 256MB flash TLB overlap
4656L2SRAM_ADDR?=0xF8F00000
47- #L2SRAM_ADDR?=0xEE900000 # CW VPX3-152
4857
4958# Flash Sector Size
5059WOLFBOOT_SECTOR_SIZE?=0x10000
5160
5261# wolfBoot start address
5362WOLFBOOT_ORIGIN?=0xEFFE0000
54- #WOLFBOOT_ORIGIN?=0xFFFE0000 # CW VPX3-152
5563# wolfBoot partition size (custom)
5664BOOTLOADER_PARTITION_SIZE=0x20000
5765
5866# Application Partition Size
5967WOLFBOOT_PARTITION_SIZE?=0x100000
6068# Location in Flash for Application Partition
6169WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xEFEE0000
62- #WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xFFEE0000 # CW VPX3-152
6370# Load Partition to RAM Address
6471WOLFBOOT_LOAD_ADDRESS?=0x19000
6572
6673# Location in Flash for Update Partition
6774WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xEFDE0000
68- #WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xFFDE0000 # CW VPX3-152
6975
7076# Location of temporary sector used during updates
7177WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xEFDD0000
72- #WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xFFDD0000 # CW VPX3-152
7378
7479# DTS (Device Tree)
7580WOLFBOOT_DTS_BOOT_ADDRESS?=0xE8040000
76- #WOLFBOOT_DTS_BOOT_ADDRESS?=0xF0040000 # CW VPX3-152
7781WOLFBOOT_DTS_UPDATE_ADDRESS?=0xE8050000
78- #WOLFBOOT_DTS_UPDATE_ADDRESS?=0xF0050000 # CW VPX3-152
7982# DTS Load to RAM Address
8083WOLFBOOT_LOAD_DTS_ADDRESS?=0x200000
8184
85+ # -----------------------------------------------------------------------------
86+ # CW VPX3-152 overrides (256 MB NOR flash @ 0xF0000000, 4 GB DDR3L)
87+ # Uncomment ALL lines below when building for VPX3-152, AND uncomment
88+ # CFLAGS_EXTRA+=-DBOARD_CW_VPX3152 at the top of this file. This is the
89+ # known-good config used to boot VxWorks 7 and Green Hills INTEGRITY-178
90+ # tuMP (Ada Scheduler) on this board.
91+ # -----------------------------------------------------------------------------
92+ #ARCH_FLASH_OFFSET=0xFFFE0000
93+ #L2SRAM_ADDR=0xEE900000
94+ #WOLFBOOT_ORIGIN=0xFFFE0000
95+ # 8 MB partitions -- full RTOS images do not fit the 1 MB RDB default.
96+ #WOLFBOOT_PARTITION_SIZE=0x800000
97+ #WOLFBOOT_PARTITION_BOOT_ADDRESS=0xFF000000
98+ #WOLFBOOT_PARTITION_UPDATE_ADDRESS=0xFE800000
99+ #WOLFBOOT_PARTITION_SWAP_ADDRESS=0xFE7F0000
100+ #WOLFBOOT_DTS_BOOT_ADDRESS=0xF0040000
101+ #WOLFBOOT_DTS_UPDATE_ADDRESS=0xF0050000
102+ #WOLFBOOT_LOAD_DTS_ADDRESS=0x03FE6000
103+ # REQUIRED for 64-bit RTOS boot (VxWorks 7 / INTEGRITY-178 tuMP). Gates the
104+ # e6500 SMP spin-table (0x7FEE41C0) + DDR-LAW-slot-17 handoff in
105+ # hal/nxp_t2080.c. Without it the loader runs but the OS hangs silently after
106+ # "do_boot: jumping" (it is NOT a missing device tree -- tuMP has no FDT
107+ # parser; this build option is what was actually missing).
108+ #OS_64BIT=1
109+ # ELF staging buffer. wolfBoot copies the signed image here, then elf_load
110+ # scatters PT_LOAD segments IN PLACE to their vaddrs. It MUST sit ABOVE the
111+ # ELF's vaddr span (a VxWorks/INTEGRITY ELF spans ~0x2000-0x75F000) or the
112+ # in-place loader's collide-guard silently drops the segment overlapping the
113+ # program-header table -- the OS then executes unloaded memory and traps
114+ # early. The 0x19000 default overlaps the span; 0x900000 is above it, below
115+ # the 16 MB DDR stack, inside the 32 MB cache-inhibit window. Raw uImage
116+ # kernels override this via ih_load (unaffected).
117+ #WOLFBOOT_LOAD_ADDRESS=0x900000
118+ # Optional: verbose pre-OS register/TLB/LAW dump for handoff debugging.
119+ #CFLAGS_EXTRA+=-DWOLFBOOT_PPC_PRE_OS_DUMP
120+
82121# Flash erase/write/read test at update partition address
83122#TEST_FLASH?=1
84123
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