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Local Kinetis stuff
1 parent 004eb2f commit 9bae113

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Lines changed: 49 additions & 0 deletions
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@@ -0,0 +1,49 @@
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ARCH?=ARM
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TARGET?=kinetis_kl26
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SIGN?=LMS
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HASH?=SHA256
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LMS_LEVELS=1
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LMS_HEIGHT=10
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LMS_WINTERNITZ=8
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IMAGE_SIGNATURE_SIZE=1456
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# Keytools (sign.c) forces header_sz >= 2 * sig_sz for LMS, so the minimum
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# is 3552; round up to the next power of two.
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IMAGE_HEADER_SIZE=4096
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MCUXSDK?=0
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MCUXPRESSO?=$(PWD)/../NXP/SDK_2_2_0_FRDM-KL26Z
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MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
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MCUXPRESSO_CPU?=MKL26Z128VLH4
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MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MKL26Z4
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DEBUG?=0
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VTOR?=1
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CORTEX_M0?=1
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NO_ASM?=0
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EXT_FLASH?=0
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SPI_FLASH?=0
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ALLOW_DOWNGRADE?=0
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NVM_FLASH_WRITEONCE?=1
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WOLFBOOT_VERSION?=0
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V?=0
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SPMATH?=1
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RAM_CODE?=0
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DUALBANK_SWAP?=0
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PKA?=0
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DEBUG_UART?=1
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# Cortex-M0+ doesn't support unaligned word accesses. WOLFSSL_USE_ALIGN
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# routes word-sized hash operations through byte-safe code paths when the
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# buffers (e.g. LMS internal hash state) aren't 4-byte aligned.
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CFLAGS_EXTRA+=-DWOLFSSL_USE_ALIGN
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# Logical sector = 4 KL26 hardware sectors (1KB each). Required because
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# IMAGE_HEADER_SIZE (4096) must be <= WOLFBOOT_SECTOR_SIZE.
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WOLFBOOT_SECTOR_SIZE?=0x1000
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# 128KB flash, 16KB SRAM
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# 32KB bootloader, 44KB boot/update partitions, 4KB swap at last logical sector
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WOLFBOOT_PARTITION_SIZE?=0xB000
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WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x8000
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WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x13000
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WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1F000

hal/kinetis_kl26.c

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ int uart_tx(const uint8_t c);
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int uart_rx(uint8_t *c);
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#ifdef DEBUG_UART
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void uart_write(const char *buf, unsigned int len);
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void uart_printf(const char *fmt, ...);
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#endif
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#ifndef NVM_FLASH_WRITEONCE
@@ -114,8 +115,40 @@ static const osc_config_t oscConfig_BOARD_BootClockRUN = {
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static void do_flash_init(void);
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/* Stack high-water-mark instrumentation. Paints the unused stack region with
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* a sentinel at hal_init entry and reports the high-water mark just before
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* jumping to the application. */
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extern uint32_t _end_bss;
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extern uint32_t END_STACK;
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#define STACK_FILL 0xA5A5A5A5UL
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static void paint_stack(void)
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{
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register uint32_t sp;
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uint32_t *p;
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__asm__ volatile("mov %0, sp" : "=r"(sp));
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/* Leave a 64-byte safety margin so we don't overwrite our own frame. */
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sp -= 64U;
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for (p = &_end_bss; (uint32_t)p < sp; p++)
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*p = STACK_FILL;
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}
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static uint32_t stack_used(void)
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{
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uint32_t *p;
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for (p = &_end_bss; p < &END_STACK; p++) {
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if (*p != STACK_FILL)
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break;
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}
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return (uint32_t)&END_STACK - (uint32_t)p;
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}
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void hal_init(void)
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{
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/* Paint stack BEFORE anything else so the watermark covers the entire
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* boot path. */
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paint_stack();
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/* Disable the COP watchdog */
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*((volatile uint32_t *)0x40048100) = 0;
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@@ -140,6 +173,10 @@ void hal_init(void)
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void hal_prepare_boot(void)
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{
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#ifdef DEBUG_UART
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uart_printf("stack high-water: %u bytes\r\n",
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(unsigned)stack_used());
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#endif
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}
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#endif /* __WOLFBOOT */

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