Fixes for zynqmp test-app. Working SD card boot.

Author: dgarske

docs/Targets.md

@@ -1991,7 +1991,7 @@ wolfBoot replaces U-Boot in the ZynqMP boot flow:
 FSBL -> PMUFW -> BL31 (EL3) -> wolfBoot (EL2) -> Linux (EL1)
 ```
 
-For QSPI boot, wolfBoot runs from DDR at `0x7FF00000` (EL2, non-secure). For SD card boot, wolfBoot runs at `0x8000000`. All clock, MIO, and DDR initialization is handled by the FSBL/PMUFW before wolfBoot starts.
+For QSPI boot, wolfBoot runs from DDR at `0x7FE00000` (EL2, non-secure). For SD card boot, wolfBoot runs at `0x8000000`. All clock, MIO, and DDR initialization is handled by the FSBL/PMUFW before wolfBoot starts.
 
 This target supports **two boot paths**:
 - **QSPI boot** (primary, production-style): `config/examples/zynqmp.config`
@@ -2049,7 +2049,7 @@ make
 **QSPI layout**
 | Partition   | Size   | Address     | Description                    |
 |-------------|--------|-------------|--------------------------------|
-| Bootloader  | -      | 0x7FF00000  | wolfBoot in DDR (loaded by FSBL) |
+| Bootloader  | -      | 0x7FE00000  | wolfBoot in DDR (loaded by FSBL) |
 | Primary     | 42MB   | 0x800000    | Boot partition in QSPI         |
 | Update      | 42MB   | 0x3A00000   | Update partition in QSPI       |
 | Swap        | -      | 0x63E0000   | Swap area in QSPI              |

hal/zynq.c

@@ -2175,16 +2175,19 @@ void sdhci_platform_dma_prepare(void *buf, uint32_t sz, int is_write)
 
 void sdhci_platform_dma_complete(void *buf, uint32_t sz, int is_write)
 {
-    (void)is_write;
-    /* After DMA: clean and invalidate to ensure CPU sees DMA-written data */
+    /* After DMA read (card->memory): invalidate so CPU sees DMA-written data.
+     * For DMA write (card<-memory): DMA only read from memory, so there is no
+     * new data for the CPU to see and invalidation could discard dirty lines. */
     uintptr_t addr;
     uintptr_t start = (uintptr_t)buf & ~(CACHE_LINE_SIZE - 1);
     uintptr_t end = (uintptr_t)buf + sz;
 
-    for (addr = start; addr < end; addr += CACHE_LINE_SIZE) {
-        __asm__ volatile("dc civac, %0" : : "r"(addr) : "memory");
+    if (!is_write) {
+        for (addr = start; addr < end; addr += CACHE_LINE_SIZE) {
+            __asm__ volatile("dc civac, %0" : : "r"(addr) : "memory");
+        }
+        __asm__ volatile("dsb sy" : : : "memory");
     }
-    __asm__ volatile("dsb sy" : : : "memory");
 }
 #endif /* DISK_SDCARD || DISK_EMMC */
 

hal/zynq.h

@@ -63,8 +63,8 @@
 
 
 /* IOP System-level Control */
-#define IOU_SLCR_BASSE             0xFF180000
-#define IOU_TAPDLY_BYPASS_ADDR     (IOU_SLCR_BASSE + 0x390)
+#define IOU_SLCR_BASE              0xFF180000
+#define IOU_TAPDLY_BYPASS_ADDR     (IOU_SLCR_BASE + 0x390)
 #define IOU_TAPDLY_BYPASS          (*((volatile uint32_t*)IOU_TAPDLY_BYPASS_ADDR))
 #define IOU_TAPDLY_BYPASS_LQSPI_RX (1UL << 2) /* LQSPI Tap Delay Enable on Rx Clock signal. 0: enable. 1: disable (bypass tap delay). */
 
@@ -419,7 +419,7 @@
 #define RST_LPD_IOU2_SDIO1  (1UL << 6)
 
 /* IOU_SLCR SD Configuration (feeds into SDHCI Capabilities register) */
-#define IOU_SLCR_SD_CONFIG_REG2  (*((volatile uint32_t*)(IOU_SLCR_BASSE + 0x320)))
+#define IOU_SLCR_SD_CONFIG_REG2  (*((volatile uint32_t*)(IOU_SLCR_BASE + 0x320)))
 /* SD1 Slot Type: 00=Removable, 01=Embedded, 10=Shared Bus */
 #define SD_CONFIG_REG2_SD1_SLOTTYPE_SHIFT  28
 #define SD_CONFIG_REG2_SD1_SLOTTYPE_MASK   0x30000000UL

hal/zynq.ld

@@ -41,7 +41,7 @@ SECTIONS
    *(.gnu.linkonce.t.*)
    *(.plt)
    *(.gnu_warning)
-   *(.gcc_execpt_table)
+   *(.gcc_except_table)
    *(.glue_7)
    *(.glue_7t)
    *(.ARM.extab)
@@ -200,7 +200,7 @@ SECTIONS
 .ARM.exidx : {
    __exidx_start = .;
    *(.ARM.exidx*)
-   *(.gnu.linkonce.armexidix.*.*)
+   *(.gnu.linkonce.armexidx.*.*)
    __exidx_end = .;
 } > psu_ddr_0_MEM_0
 

hal/zynq_sd.ld

@@ -41,7 +41,7 @@ SECTIONS
    *(.gnu.linkonce.t.*)
    *(.plt)
    *(.gnu_warning)
-   *(.gcc_execpt_table)
+   *(.gcc_except_table)
    *(.glue_7)
    *(.glue_7t)
    *(.ARM.extab)
@@ -200,7 +200,7 @@ SECTIONS
 .ARM.exidx : {
    __exidx_start = .;
    *(.ARM.exidx*)
-   *(.gnu.linkonce.armexidix.*.*)
+   *(.gnu.linkonce.armexidx.*.*)
    __exidx_end = .;
 } > psu_ddr_0_MEM_0
 

src/boot_aarch64.c

@@ -23,6 +23,7 @@
 
 #include "image.h"
 #include "loader.h"
+#include "printf.h"
 #include "wolfboot/wolfboot.h"
 
 /* Include platform-specific header for EL configuration defines */
@@ -130,7 +131,10 @@ void RAMFUNCTION do_boot(const uint32_t *app_offset, const uint32_t* dts_offset)
 void RAMFUNCTION do_boot(const uint32_t *app_offset)
 #endif
 {
+    wolfBoot_printf("do_boot: entry=0x%08x, EL=%d\n",
+        (uint32_t)(uintptr_t)app_offset, current_el());
 #ifdef MMU
+    wolfBoot_printf("do_boot: dts=0x%08x\n", (uint32_t)(uintptr_t)dts_offset);
     hal_dts_fixup((uint32_t*)dts_offset);
 #endif
 
@@ -155,6 +159,7 @@ void RAMFUNCTION do_boot(const uint32_t *app_offset)
     #else
         uintptr_t dts = 0;
     #endif
+        wolfBoot_printf("do_boot: EL2->EL1 via ERET\n");
         el2_to_el1_boot((uintptr_t)app_offset, dts);
     }
 #else

test-app/app_zynq.c

@@ -1,6 +1,6 @@
 /* app_zynq.c
  *
- * Test bare-metal boot application
+ * Test bare-metal boot application for AMD ZynqMP ZCU102
  *
  * Copyright (C) 2025 wolfSSL Inc.
  *
@@ -21,19 +21,56 @@
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
  */
 
-#include <stdlib.h>
 #include <stdint.h>
-#include <string.h>
 
 #include "wolfboot/wolfboot.h"
+#include "printf.h"
 
 #ifdef TARGET_zynq
 
-volatile uint32_t time_elapsed = 0;
-void main(void) {
+/* Provide current_el() for hal/zynq.o (normally in boot_aarch64.c) */
+unsigned int current_el(void)
+{
+    unsigned long el;
+    __asm__ volatile("mrs %0, CurrentEL" : "=r" (el) : : "cc");
+    return (unsigned int)((el >> 2) & 0x3U);
+}
+
+/* Stub for QSPI DMA code in hal/zynq.o (not used with SD card boot) */
+void flush_dcache_range(unsigned long start, unsigned long end)
+{
+    (void)start;
+    (void)end;
+}
+
+void main(void)
+{
+#ifdef WOLFBOOT_FIXED_PARTITIONS
+    uint32_t boot_version, update_version;
+#endif
+
+    wolfBoot_printf("\n\n");
+    wolfBoot_printf("===========================================\n");
+    wolfBoot_printf(" wolfBoot Test Application - AMD ZynqMP\n");
+    wolfBoot_printf("===========================================\n\n");
+
+    wolfBoot_printf("Current EL: %d\n", current_el());
+
+#ifdef WOLFBOOT_FIXED_PARTITIONS
+    boot_version = wolfBoot_get_image_version(PART_BOOT);
+    update_version = wolfBoot_get_image_version(PART_UPDATE);
+    wolfBoot_printf("BOOT: Version: %d (0x%08x)\n", boot_version, boot_version);
+    wolfBoot_printf("UPDATE: Version: %d (0x%08x)\n", update_version, update_version);
+#else
+    wolfBoot_printf("Boot mode: Disk-based (MBR partitions)\n");
+#endif
+
+    wolfBoot_printf("Application running successfully!\n");
+    wolfBoot_printf("\nEntering idle loop...\n");
 
-    /* Wait for reboot */
-    while(1)
-        ;
+    /* Idle loop */
+    while (1) {
+        __asm__ volatile("wfi");
+    }
 }
 #endif /** TARGET_zynq **/