Fixes for M-Mode test-app

Author: dgarske

hal/mpfs250.h

@@ -365,6 +365,10 @@ typedef struct {
 
 /* Multi-hart function declarations */
 #ifndef __ASSEMBLER__
+#ifdef DEBUG_UART
+void uart_init(void);
+void uart_write(const char* buf, unsigned int sz);
+#endif
 #ifdef WOLFBOOT_RISCV_MMODE
 int mpfs_wake_secondary_harts(void);
 void secondary_hart_entry(unsigned long hartid, HLS_DATA* hls);

src/boot_riscv.c

@@ -445,29 +445,34 @@ void do_boot(const uint32_t *app_offset)
      */
 
 #ifdef WOLFBOOT_RISCV_MMODE
+#ifdef WOLFBOOT_MMODE_SMODE_BOOT
     /*
      * M-mode to S-mode transition for booting Linux:
      * 1. Set up PMP to allow S-mode full memory access
      * 2. Delegate traps/interrupts to S-mode
      * 3. Use MRET to switch to S-mode and jump to kernel
      */
-#ifdef DEBUG_BOOT
-    wolfBoot_printf("Setting up M-mode to S-mode transition...\n");
-    wolfBoot_printf("  PMP: Configuring for S-mode access\n");
-#endif
+    wolfBoot_printf("M->S transition: entry=0x%lx\n", (unsigned long)app_offset);
     setup_pmp_for_smode();
-
-#ifdef DEBUG_BOOT
-    wolfBoot_printf("  Delegating traps to S-mode\n");
-#endif
     delegate_traps_to_smode();
-
-#ifdef DEBUG_BOOT
-    wolfBoot_printf("  Entering S-mode: entry=0x%lx, hartid=%lu, dtb=0x%lx\n",
-        (unsigned long)app_offset, hartid, dts_addr);
-#endif
     /* This never returns */
     enter_smode((unsigned long)app_offset, hartid, dts_addr);
+#else
+    /*
+     * Direct M-mode jump for bare-metal payloads (no S-mode transition).
+     * Use this for test-apps; define WOLFBOOT_MMODE_SMODE_BOOT for Linux.
+     */
+    wolfBoot_printf("M-mode direct jump to 0x%lx\n", (unsigned long)app_offset);
+    /* Drain UART before jumping */
+    {
+        volatile int i;
+        for (i = 0; i < 100000; i++) {}
+    }
+    (void)hartid;
+    (void)dts_addr;
+    asm volatile("jr %0" : : "r"(app_offset));
+    __builtin_unreachable();
+#endif /* WOLFBOOT_MMODE_SMODE_BOOT */
 
 #elif __riscv_xlen == 64
     asm volatile(

test-app/app_mpfs250.c

@@ -36,8 +36,10 @@
 
 void main(void)
 {
+    /* wolfBoot already initialized L2 cache, UART clocks, and QSPI.
+     * Just re-init UART registers (clocks already on). Do NOT call
+     * hal_init() - it would try to write to _main_hart_hls=0 (NULL). */
     uart_init();
-    hal_init();
 
     wolfBoot_printf("========================\r\n");
     wolfBoot_printf("PolarFire SoC MPFS250 wolfBoot demo Application\r\n");

test-app/startup_riscv.c

@@ -42,12 +42,10 @@ void __attribute__((naked,section(".init"))) _reset(void) {
     asm volatile("la gp, _global_pointer");
     asm volatile("la sp, _end_stack");
 
-    /* Set up vectored interrupt, with IV starting at offset 0x100 */
-#ifndef WOLFBOOT_RISCV_MMODE
+    /* Set up vectored interrupt, with IV starting at offset 0x100.
+     * Always use stvec: wolfBoot M-mode uses enter_smode() to transition
+     * the payload to S-mode, so stvec is correct in all cases. */
     asm volatile("csrw stvec, %0":: "r"((uint8_t *)(&_start_vector) + 1));
-#else
-    asm volatile("csrw mtvec, %0":: "r"((uint8_t *)(&_start_vector) + 1));
-#endif
 
     src = (uint32_t *) &_stored_data;
     dst = (uint32_t *) &_start_data;
@@ -79,11 +77,8 @@ void do_boot(const uint32_t *app_offset)
 static uint32_t synctrap_cause = 0;
 void __attribute__((naked)) isr_synctrap(void)
 {
-#ifndef WOLFBOOT_RISCV_MMODE
+    /* Always use scause: payload always runs in S-mode under wolfBoot */
     asm volatile("csrr %0, scause" : "=r"(synctrap_cause));
-#else
-    asm volatile("csrr %0, mcause" : "=r"(synctrap_cause));
-#endif
 }
 
 void isr_empty(void)

test-app/vector_riscv.S

@@ -62,11 +62,8 @@
     ld x30, 112(sp)
     ld x31, 120(sp)
     addi sp, sp, 128
-#ifndef WOLFBOOT_RISCV_MMODE
+    /* Always sret: payload always runs in S-mode under wolfBoot */
     sret
-#else
-    mret
-#endif
 .endm
 
 #else /* __riscv_xlen == 32 */
@@ -110,11 +107,8 @@
   lw x30, 56(sp)
   lw x31, 60(sp)
   addi sp, sp, 64
-#ifndef WOLFBOOT_RISCV_MMODE
+  /* Always sret: payload always runs in S-mode under wolfBoot */
   sret
-#else
-  mret
-#endif
 .endm
 
 #endif /* __riscv_xlen */