diff --git a/boards/stm32wb55xx_nucleo/board.c b/boards/stm32wb55xx_nucleo/board.c index b1a909a..282d5ce 100644 --- a/boards/stm32wb55xx_nucleo/board.c +++ b/boards/stm32wb55xx_nucleo/board.c @@ -237,22 +237,10 @@ whal_Rng g_whalRng = { }; /* Crypto */ -static const whal_Crypto_OpFunc cryptoOps[BOARD_CRYPTO_OP_COUNT] = { - [BOARD_CRYPTO_AES_ECB] = whal_Stm32wbAes_AesEcb, - [BOARD_CRYPTO_AES_CBC] = whal_Stm32wbAes_AesCbc, - [BOARD_CRYPTO_AES_CTR] = whal_Stm32wbAes_AesCtr, - [BOARD_CRYPTO_AES_GCM] = whal_Stm32wbAes_AesGcm, - [BOARD_CRYPTO_AES_GMAC] = whal_Stm32wbAes_AesGmac, - [BOARD_CRYPTO_AES_CCM] = whal_Stm32wbAes_AesCcm, -}; - whal_Crypto g_whalCrypto = { .regmap = { WHAL_STM32WB55_AES1_REGMAP }, /* .driver: direct API mapping */ - .ops = cryptoOps, - .opsCount = BOARD_CRYPTO_OP_COUNT, - .cfg = &(whal_Stm32wbAes_Cfg) { .timeout = &g_whalTimeout, }, diff --git a/boards/stm32wb55xx_nucleo/board.h b/boards/stm32wb55xx_nucleo/board.h index 5a180fd..404c872 100644 --- a/boards/stm32wb55xx_nucleo/board.h +++ b/boards/stm32wb55xx_nucleo/board.h @@ -41,15 +41,6 @@ enum { #define BOARD_FLASH_TEST_ADDR 0x0807F000 #define BOARD_FLASH_SECTOR_SZ 0x1000 -enum { - BOARD_CRYPTO_AES_ECB, - BOARD_CRYPTO_AES_CBC, - BOARD_CRYPTO_AES_CTR, - BOARD_CRYPTO_AES_GCM, - BOARD_CRYPTO_AES_GMAC, - BOARD_CRYPTO_AES_CCM, - BOARD_CRYPTO_OP_COUNT, -}; whal_Error Board_Init(void); whal_Error Board_Deinit(void); diff --git a/docs/getting_started.md b/docs/getting_started.md index 2365706..2d91bd9 100644 --- a/docs/getting_started.md +++ b/docs/getting_started.md @@ -230,7 +230,7 @@ operation completed. The error codes are: | `WHAL_ENOTREADY` | Resource is busy or not yet available | | `WHAL_EHARDWARE` | Hardware error (e.g., RNG entropy failure) | | `WHAL_ETIMEOUT` | Operation timed out waiting for hardware | -| `WHAL_ENOTIMPL` | Operation not implemented by this driver | +| `WHAL_ENOTSUP` | Operation or parameter not supported by this driver/hardware | ## Optimizing for Size @@ -281,7 +281,7 @@ static const whal_GpioDriver myGpioDriver = { .Init = whal_Stm32wbGpio_Init, .Deinit = whal_Stm32wbGpio_Deinit, .Set = whal_Stm32wbGpio_Set, - /* Get left as NULL — calls return WHAL_ENOTIMPL, saves pulling in that code */ + /* Get left as NULL — calls return WHAL_ENOTSUP, saves pulling in that code */ }; whal_Gpio g_whalGpio = { diff --git a/docs/writing_a_driver.md b/docs/writing_a_driver.md index bb75854..f91dbb9 100644 --- a/docs/writing_a_driver.md +++ b/docs/writing_a_driver.md @@ -515,10 +515,10 @@ transfer. The buffer must remain valid until the transfer completes. The driver signals completion through a platform-specific mechanism. Drivers that do not support async should set SendAsync to NULL in the vtable. -The dispatch layer returns WHAL_ENOTIMPL when the caller tries to use any +The dispatch layer returns WHAL_ENOTSUP when the caller tries to use any NULL vtable entry (or when the driver pointer itself is NULL). When direct API mapping is active, polled drivers provide stub implementations that -return WHAL_ENOTIMPL directly. +return WHAL_ENOTSUP directly. ### RecvAsync @@ -527,8 +527,8 @@ transfer. The buffer must remain valid until the transfer completes. The async variants are optional — a driver vtable only needs to populate them if the platform supports non-blocking transfers. Polled-only drivers -leave these NULL (the dispatch layer returns WHAL_ENOTIMPL) or provide -stubs returning WHAL_ENOTIMPL (direct API mapping). +leave these NULL (the dispatch layer returns WHAL_ENOTSUP) or provide +stubs returning WHAL_ENOTSUP (direct API mapping). --- diff --git a/src/block/block.c b/src/block/block.c index 8afadd7..c4e300f 100644 --- a/src/block/block.c +++ b/src/block/block.c @@ -7,7 +7,7 @@ inline whal_Error whal_Block_Init(whal_Block *blockDev) if (!blockDev) return WHAL_EINVAL; if (!blockDev->driver || !blockDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return blockDev->driver->Init(blockDev); } @@ -17,7 +17,7 @@ inline whal_Error whal_Block_Deinit(whal_Block *blockDev) if (!blockDev) return WHAL_EINVAL; if (!blockDev->driver || !blockDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return blockDev->driver->Deinit(blockDev); } @@ -28,7 +28,7 @@ inline whal_Error whal_Block_Read(whal_Block *blockDev, uint32_t block, if (!blockDev || !data) return WHAL_EINVAL; if (!blockDev->driver || !blockDev->driver->Read) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return blockDev->driver->Read(blockDev, block, data, blockCount); } @@ -39,7 +39,7 @@ inline whal_Error whal_Block_Write(whal_Block *blockDev, uint32_t block, if (!blockDev || !data) return WHAL_EINVAL; if (!blockDev->driver || !blockDev->driver->Write) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return blockDev->driver->Write(blockDev, block, data, blockCount); } @@ -50,7 +50,7 @@ inline whal_Error whal_Block_Erase(whal_Block *blockDev, uint32_t block, if (!blockDev) return WHAL_EINVAL; if (!blockDev->driver || !blockDev->driver->Erase) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return blockDev->driver->Erase(blockDev, block, blockCount); } diff --git a/src/clock/clock.c b/src/clock/clock.c index c3fba99..16fd386 100644 --- a/src/clock/clock.c +++ b/src/clock/clock.c @@ -6,7 +6,7 @@ inline whal_Error whal_Clock_Init(whal_Clock *clkDev) if (!clkDev) return WHAL_EINVAL; if (!clkDev->driver || !clkDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return clkDev->driver->Init(clkDev); } @@ -16,27 +16,27 @@ inline whal_Error whal_Clock_Deinit(whal_Clock *clkDev) if (!clkDev) return WHAL_EINVAL; if (!clkDev->driver || !clkDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return clkDev->driver->Deinit(clkDev); } inline whal_Error whal_Clock_Enable(whal_Clock *clkDev, const void *clk) { - if (!clkDev) + if (!clkDev || !clk) return WHAL_EINVAL; if (!clkDev->driver || !clkDev->driver->Enable) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return clkDev->driver->Enable(clkDev, clk); } inline whal_Error whal_Clock_Disable(whal_Clock *clkDev, const void *clk) { - if (!clkDev) + if (!clkDev || !clk) return WHAL_EINVAL; if (!clkDev->driver || !clkDev->driver->Disable) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return clkDev->driver->Disable(clkDev, clk); } diff --git a/src/clock/stm32wb_rcc.c b/src/clock/stm32wb_rcc.c index 636c690..510a445 100644 --- a/src/clock/stm32wb_rcc.c +++ b/src/clock/stm32wb_rcc.c @@ -258,9 +258,14 @@ whal_Error whal_Stm32wbRccMsi_Deinit(whal_Clock *clkDev) whal_Error whal_Stm32wbRcc_Enable(whal_Clock *clkDev, const void *clk) { - whal_Stm32wbRcc_Clk *stClk = (whal_Stm32wbRcc_Clk *)clk; + whal_Stm32wbRcc_Clk *stClk; + + if (!clkDev || !clk) { + return WHAL_EINVAL; + } + + stClk = (whal_Stm32wbRcc_Clk *)clk; - /* Set the peripheral's enable bit in the appropriate RCC enable register */ whal_Reg_Update(clkDev->regmap.base, stClk->regOffset, stClk->enableMask, whal_SetBits(stClk->enableMask, stClk->enablePos, 1)); @@ -269,9 +274,14 @@ whal_Error whal_Stm32wbRcc_Enable(whal_Clock *clkDev, const void *clk) whal_Error whal_Stm32wbRcc_Disable(whal_Clock *clkDev, const void *clk) { - whal_Stm32wbRcc_Clk *stClk = (whal_Stm32wbRcc_Clk *)clk; + whal_Stm32wbRcc_Clk *stClk; + + if (!clkDev || !clk) { + return WHAL_EINVAL; + } + + stClk = (whal_Stm32wbRcc_Clk *)clk; - /* Clear the peripheral's enable bit to gate its clock */ whal_Reg_Update(clkDev->regmap.base, stClk->regOffset, stClk->enableMask, whal_SetBits(stClk->enableMask, stClk->enablePos, 0)); diff --git a/src/crypto/crypto.c b/src/crypto/crypto.c index a60ddb0..e79b45c 100644 --- a/src/crypto/crypto.c +++ b/src/crypto/crypto.c @@ -4,32 +4,54 @@ #ifndef WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES whal_Error whal_Crypto_Init(whal_Crypto *cryptoDev) { - if (!cryptoDev || !cryptoDev->driver || !cryptoDev->driver->Init) { + if (!cryptoDev) return WHAL_EINVAL; - } + if (!cryptoDev->driver || !cryptoDev->driver->Init) + return WHAL_ENOTSUP; return cryptoDev->driver->Init(cryptoDev); } whal_Error whal_Crypto_Deinit(whal_Crypto *cryptoDev) { - if (!cryptoDev || !cryptoDev->driver || !cryptoDev->driver->Deinit) { + if (!cryptoDev) return WHAL_EINVAL; - } + if (!cryptoDev->driver || !cryptoDev->driver->Deinit) + return WHAL_ENOTSUP; return cryptoDev->driver->Deinit(cryptoDev); } -#endif -whal_Error whal_Crypto_Op(whal_Crypto *cryptoDev, size_t op, void *opArgs) +whal_Error whal_Crypto_StartOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs) +{ + if (!cryptoDev || !opArgs) + return WHAL_EINVAL; + if (!cryptoDev->driver || !cryptoDev->driver->StartOp) + return WHAL_ENOTSUP; + + return cryptoDev->driver->StartOp(cryptoDev, opId, opArgs); +} + +whal_Error whal_Crypto_Process(whal_Crypto *cryptoDev, size_t opId, + void *opArgs) { - if (!cryptoDev || !cryptoDev->ops || !opArgs) { + if (!cryptoDev || !opArgs) return WHAL_EINVAL; - } + if (!cryptoDev->driver || !cryptoDev->driver->Process) + return WHAL_ENOTSUP; + + return cryptoDev->driver->Process(cryptoDev, opId, opArgs); +} - if (op >= cryptoDev->opsCount || !cryptoDev->ops[op]) { +whal_Error whal_Crypto_EndOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs) +{ + if (!cryptoDev || !opArgs) return WHAL_EINVAL; - } + if (!cryptoDev->driver || !cryptoDev->driver->EndOp) + return WHAL_ENOTSUP; - return cryptoDev->ops[op](cryptoDev, opArgs); + return cryptoDev->driver->EndOp(cryptoDev, opId, opArgs); } +#endif diff --git a/src/crypto/stm32wb_aes.c b/src/crypto/stm32wb_aes.c index 0151ae6..8bf48c2 100644 --- a/src/crypto/stm32wb_aes.c +++ b/src/crypto/stm32wb_aes.c @@ -6,49 +6,44 @@ #include #include -/* - * STM32WB AES1 Register Definitions - * - * The AES1 peripheral provides hardware acceleration for 128/256-bit - * AES in ECB, CBC, CTR, GCM, GMAC, and CCM modes. Data is fed through DINR and - * read from DOUTR, 32 bits at a time. - */ - /* Control Register */ #define AES_CR_REG 0x00 -#define AES_CR_EN_Pos 0 /* AES enable */ +#define AES_CR_EN_Pos 0 #define AES_CR_EN_Msk (1UL << AES_CR_EN_Pos) -#define AES_CR_DATATYPE_Pos 1 /* Data type selection */ +#define AES_CR_DATATYPE_Pos 1 #define AES_CR_DATATYPE_Msk (3UL << AES_CR_DATATYPE_Pos) -#define AES_CR_MODE_Pos 3 /* Operating mode */ +#define AES_CR_MODE_Pos 3 #define AES_CR_MODE_Msk (3UL << AES_CR_MODE_Pos) -#define AES_CR_CHMOD_Pos 5 /* Chaining mode [1:0] */ +#define AES_CR_CHMOD_Pos 5 #define AES_CR_CHMOD_Msk (3UL << AES_CR_CHMOD_Pos) -#define AES_CR_CHMOD2_Pos 16 /* Chaining mode [2] */ +#define AES_CR_CHMOD2_Pos 16 #define AES_CR_CHMOD2_Msk (1UL << AES_CR_CHMOD2_Pos) -#define AES_CR_CCFC_Pos 7 /* Computation complete flag clear */ +#define AES_CR_CCFC_Pos 7 #define AES_CR_CCFC_Msk (1UL << AES_CR_CCFC_Pos) -#define AES_CR_KEYSIZE_Pos 18 /* Key size (0=128, 1=256) */ +#define AES_CR_KEYSIZE_Pos 18 #define AES_CR_KEYSIZE_Msk (1UL << AES_CR_KEYSIZE_Pos) -#define AES_CR_GCMPH_Pos 13 /* GCM phase */ +#define AES_CR_GCMPH_Pos 13 #define AES_CR_GCMPH_Msk (3UL << AES_CR_GCMPH_Pos) +#define AES_CR_NPBLB_Pos 20 +#define AES_CR_NPBLB_Msk (0xF << AES_CR_NPBLB_Pos) + /* Status Register */ #define AES_SR_REG 0x04 -#define AES_SR_CCF_Pos 0 /* Computation complete */ +#define AES_SR_CCF_Pos 0 #define AES_SR_CCF_Msk (1UL << AES_SR_CCF_Pos) -#define AES_SR_RDERR_Pos 1 /* Read error */ +#define AES_SR_RDERR_Pos 1 #define AES_SR_RDERR_Msk (1UL << AES_SR_RDERR_Pos) -#define AES_SR_WRERR_Pos 2 /* Write error */ +#define AES_SR_WRERR_Pos 2 #define AES_SR_WRERR_Msk (1UL << AES_SR_WRERR_Pos) /* Data Registers */ @@ -76,7 +71,7 @@ #define AES_CHMOD_CBC 0x1 #define AES_CHMOD_CTR 0x2 #define AES_CHMOD_GCM 0x3 -#define AES_CHMOD_CCM 0x4 /* CHMOD[2:0] = 100 */ +#define AES_CHMOD_CCM 0x4 /* Operating modes */ #define AES_MODE_ENCRYPT 0x0 @@ -85,11 +80,10 @@ #define AES_MODE_KEYDERIV_DECRYPT 0x3 /* Data types (swap modes) */ -#define AES_DATATYPE_NONE 0x0 /* No swapping */ -#define AES_DATATYPE_HALFWORD 0x1 /* 16-bit half-word swap */ -#define AES_DATATYPE_BYTE 0x2 /* 8-bit byte swap */ -#define AES_DATATYPE_BIT 0x3 /* 1-bit bit swap */ - +#define AES_DATATYPE_NONE 0x0 +#define AES_DATATYPE_HALFWORD 0x1 +#define AES_DATATYPE_BYTE 0x2 +#define AES_DATATYPE_BIT 0x3 /* GCM phases */ #define AES_GCMPH_INIT 0x0 @@ -150,8 +144,11 @@ static whal_Error WaitForCCF(size_t base, whal_Timeout *timeout) #ifdef WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES -#define whal_Stm32wbAes_Init whal_Crypto_Init -#define whal_Stm32wbAes_Deinit whal_Crypto_Deinit +#define whal_Stm32wbAes_Init whal_Crypto_Init +#define whal_Stm32wbAes_Deinit whal_Crypto_Deinit +#define whal_Stm32wbAes_StartOp whal_Crypto_StartOp +#define whal_Stm32wbAes_Process whal_Crypto_Process +#define whal_Stm32wbAes_EndOp whal_Crypto_EndOp #endif /* WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES */ whal_Error whal_Stm32wbAes_Init(whal_Crypto *cryptoDev) @@ -169,49 +166,31 @@ whal_Error whal_Stm32wbAes_Deinit(whal_Crypto *cryptoDev) return WHAL_EINVAL; } - /* Disable AES peripheral */ whal_Reg_Update(cryptoDev->regmap.base, AES_CR_REG, AES_CR_EN_Msk, whal_SetBits(AES_CR_EN_Msk, AES_CR_EN_Pos, 0)); return WHAL_SUCCESS; } - -whal_Error whal_Stm32wbAes_AesEcb(whal_Crypto *cryptoDev, void *opArgs) +static whal_Error StartOp_AesEcb(whal_Crypto *cryptoDev, void *opArgs) { - whal_Error err = WHAL_SUCCESS; - whal_Crypto_AesEcbArgs *args; - const whal_Stm32wbAes_Cfg *cfg; - size_t base; + whal_Crypto_AesEcbArgs *args = (whal_Crypto_AesEcbArgs *)opArgs; + size_t base = cryptoDev->regmap.base; size_t mode; size_t keySizeBit; - size_t i; - - if (!cryptoDev || !opArgs) - return WHAL_EINVAL; - args = (whal_Crypto_AesEcbArgs *)opArgs; - - if (!args->key || !args->in || !args->out) + if (!args->key) return WHAL_EINVAL; if (args->keySz != 16 && args->keySz != 32) - return WHAL_EINVAL; - - if (args->sz == 0 || (args->sz & 0xF) != 0) - return WHAL_EINVAL; + return WHAL_ENOTSUP; - cfg = (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; - base = cryptoDev->regmap.base; keySizeBit = (args->keySz == 32) ? 1 : 0; - mode = (args->dir == WHAL_CRYPTO_ENCRYPT) ? AES_MODE_ENCRYPT : AES_MODE_KEYDERIV_DECRYPT; - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - /* Configure: MODE, CHMOD=ECB, DATATYPE=none, KEYSIZE */ whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_CHMOD_Msk | AES_CR_CHMOD2_Msk | AES_CR_DATATYPE_Msk | AES_CR_KEYSIZE_Msk, @@ -225,63 +204,30 @@ whal_Error whal_Stm32wbAes_AesEcb(whal_Crypto *cryptoDev, void *opArgs) WriteKey(base, args->key, args->keySz); - /* Enable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* Process each 16-byte block */ - for (i = 0; i < args->sz; i += 16) { - const uint8_t *in = args->in + i; - uint8_t *out = args->out + i; - - WriteBlock(base, in); - err = WaitForCCF(base, cfg->timeout); - if (err) - goto cleanup; - ReadBlock(base, out); - } - -cleanup: - /* Disable AES */ - whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - - return err; + return WHAL_SUCCESS; } -whal_Error whal_Stm32wbAes_AesCbc(whal_Crypto *cryptoDev, void *opArgs) +static whal_Error StartOp_AesCbc(whal_Crypto *cryptoDev, void *opArgs) { - whal_Error err = WHAL_SUCCESS; - whal_Crypto_AesCbcArgs *args; - const whal_Stm32wbAes_Cfg *cfg; - size_t base; + whal_Crypto_AesCbcArgs *args = (whal_Crypto_AesCbcArgs *)opArgs; + size_t base = cryptoDev->regmap.base; size_t mode; size_t keySizeBit; - size_t i; - - if (!cryptoDev || !opArgs) - return WHAL_EINVAL; - - args = (whal_Crypto_AesCbcArgs *)opArgs; - if (!args->key || !args->iv || !args->in || !args->out) + if (!args->key || !args->iv) return WHAL_EINVAL; if (args->keySz != 16 && args->keySz != 32) - return WHAL_EINVAL; - - if (args->sz == 0 || (args->sz & 0xF) != 0) - return WHAL_EINVAL; + return WHAL_ENOTSUP; - cfg = (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; - base = cryptoDev->regmap.base; keySizeBit = (args->keySz == 32) ? 1 : 0; - mode = (args->dir == WHAL_CRYPTO_ENCRYPT) ? AES_MODE_ENCRYPT : AES_MODE_KEYDERIV_DECRYPT; - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - /* Configure: MODE, CHMOD=CBC, DATATYPE=none, KEYSIZE */ whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_CHMOD_Msk | AES_CR_CHMOD2_Msk | AES_CR_DATATYPE_Msk | AES_CR_KEYSIZE_Msk, @@ -296,59 +242,27 @@ whal_Error whal_Stm32wbAes_AesCbc(whal_Crypto *cryptoDev, void *opArgs) WriteKey(base, args->key, args->keySz); WriteIv(base, args->iv); - /* Enable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* Process each 16-byte block */ - for (i = 0; i < args->sz; i += 16) { - const uint8_t *in = args->in + i; - uint8_t *out = args->out + i; - - WriteBlock(base, in); - err = WaitForCCF(base, cfg->timeout); - if (err) - goto cleanup; - ReadBlock(base, out); - } - -cleanup: - /* Disable AES */ - whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - - return err; + return WHAL_SUCCESS; } -whal_Error whal_Stm32wbAes_AesCtr(whal_Crypto *cryptoDev, void *opArgs) +static whal_Error StartOp_AesCtr(whal_Crypto *cryptoDev, void *opArgs) { - whal_Error err = WHAL_SUCCESS; - whal_Crypto_AesCtrArgs *args; - const whal_Stm32wbAes_Cfg *cfg; - size_t base; + whal_Crypto_AesCtrArgs *args = (whal_Crypto_AesCtrArgs *)opArgs; + size_t base = cryptoDev->regmap.base; size_t keySizeBit; - size_t i; - - if (!cryptoDev || !opArgs) - return WHAL_EINVAL; - args = (whal_Crypto_AesCtrArgs *)opArgs; - - if (!args->key || !args->iv || !args->in || !args->out) + if (!args->key || !args->iv) return WHAL_EINVAL; if (args->keySz != 16 && args->keySz != 32) - return WHAL_EINVAL; + return WHAL_ENOTSUP; - if (args->sz == 0 || (args->sz & 0xF) != 0) - return WHAL_EINVAL; - - cfg = (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; - base = cryptoDev->regmap.base; keySizeBit = (args->keySz == 32) ? 1 : 0; - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - /* Configure: MODE=encrypt (always for CTR), CHMOD=CTR, DATATYPE=none, KEYSIZE */ whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_CHMOD_Msk | AES_CR_CHMOD2_Msk | AES_CR_DATATYPE_Msk | AES_CR_KEYSIZE_Msk, @@ -364,52 +278,68 @@ whal_Error whal_Stm32wbAes_AesCtr(whal_Crypto *cryptoDev, void *opArgs) WriteKey(base, args->key, args->keySz); WriteIv(base, args->iv); - /* Enable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* Process each 16-byte block */ - for (i = 0; i < args->sz; i += 16) { - const uint8_t *in = args->in + i; - uint8_t *out = args->out + i; + return WHAL_SUCCESS; +} + +static whal_Error Process_BlockCipher(whal_Crypto *cryptoDev, + const uint8_t *in, uint8_t *out, + size_t sz) +{ + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; + whal_Error err; + size_t i; + + if (sz == 0) + return WHAL_SUCCESS; - WriteBlock(base, in); + if (!in || !out) + return WHAL_EINVAL; + + if ((sz & 0xF) != 0) + return WHAL_EINVAL; + + for (i = 0; i < sz; i += 16) { + WriteBlock(base, in + i); err = WaitForCCF(base, cfg->timeout); - if (err) - goto cleanup; - ReadBlock(base, out); + if (err) { + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return err; + } + ReadBlock(base, out + i); } -cleanup: - /* Disable AES */ - whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return WHAL_SUCCESS; +} - return err; +static whal_Error EndOp_BlockCipher(whal_Crypto *cryptoDev) +{ + whal_Reg_Update(cryptoDev->regmap.base, AES_CR_REG, AES_CR_EN_Msk, 0); + + return WHAL_SUCCESS; } -whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs) +static whal_Error StartOp_AesGcm(whal_Crypto *cryptoDev, void *opArgs) { - whal_Error err = WHAL_SUCCESS; - whal_Crypto_AesGcmArgs *args; - const whal_Stm32wbAes_Cfg *cfg; - size_t base; - size_t mode; + whal_Error err; + whal_Crypto_AesGcmArgs *args = (whal_Crypto_AesGcmArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; size_t keySizeBit; size_t i; - uint8_t tagBuf[16]; - - if (!cryptoDev || !opArgs) - return WHAL_EINVAL; - - args = (whal_Crypto_AesGcmArgs *)opArgs; if (!args->key || !args->iv || !args->tag) return WHAL_EINVAL; if (args->keySz != 16 && args->keySz != 32) - return WHAL_EINVAL; + return WHAL_ENOTSUP; if (args->ivSz != 12) - return WHAL_EINVAL; + return WHAL_ENOTSUP; if (args->sz > 0 && (!args->in || !args->out)) return WHAL_EINVAL; @@ -420,21 +350,14 @@ whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs) if (args->tagSz == 0 || args->tagSz > 16) return WHAL_EINVAL; - cfg = (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; - base = cryptoDev->regmap.base; keySizeBit = (args->keySz == 32) ? 1 : 0; - mode = (args->dir == WHAL_CRYPTO_ENCRYPT) - ? AES_MODE_ENCRYPT : AES_MODE_DECRYPT; - - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - /* --- Init phase: compute H from key --- */ whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_CHMOD_Msk | AES_CR_CHMOD2_Msk | AES_CR_DATATYPE_Msk | AES_CR_KEYSIZE_Msk | - AES_CR_GCMPH_Msk, + AES_CR_GCMPH_Msk | AES_CR_NPBLB_Msk, whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, AES_MODE_ENCRYPT) | whal_SetBits(AES_CR_CHMOD_Msk, AES_CR_CHMOD_Pos, @@ -448,20 +371,17 @@ whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs) WriteKey(base, args->key, args->keySz); - /* Write IV: 12 bytes nonce into IVR3-IVR1, counter=0x00000002 into IVR0 */ whal_Reg_Write(base, AES_IVR3_REG, whal_LoadBe32(args->iv)); whal_Reg_Write(base, AES_IVR2_REG, whal_LoadBe32(args->iv + 4)); whal_Reg_Write(base, AES_IVR1_REG, whal_LoadBe32(args->iv + 8)); whal_Reg_Write(base, AES_IVR0_REG, 0x00000002); - /* Enable AES — init phase runs, EN auto-clears when done */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); err = WaitForCCF(base, cfg->timeout); if (err) goto cleanup; - /* --- Header phase: process AAD --- */ if (args->aadSz > 0) { whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, @@ -492,47 +412,88 @@ whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs) } } - /* --- Payload phase --- */ - if (args->sz > 0) { - whal_Reg_Update(base, AES_CR_REG, - AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, - whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, mode) | - whal_SetBits(AES_CR_GCMPH_Msk, AES_CR_GCMPH_Pos, - AES_GCMPH_PAYLOAD)); + return WHAL_SUCCESS; + +cleanup: + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return err; +} - if (args->aadSz == 0) - whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); +static whal_Error Process_AesGcm(whal_Crypto *cryptoDev, void *opArgs) +{ + whal_Crypto_AesGcmArgs *args = (whal_Crypto_AesGcmArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; + size_t mode; + whal_Error err; + size_t i; - for (i = 0; i < args->sz; i += 16) { - const uint8_t *in = args->in + i; - uint8_t *out = args->out + i; - size_t remain = args->sz - i; - uint8_t block[16] = {0}; - size_t j; + if (args->sz == 0) + return WHAL_SUCCESS; - if (remain >= 16) { - WriteBlock(base, in); - } else { - for (j = 0; j < remain; j++) - block[j] = in[j]; - WriteBlock(base, block); - } + if (!args->in || !args->out) + return WHAL_EINVAL; - err = WaitForCCF(base, cfg->timeout); - if (err) - goto cleanup; + mode = (args->dir == WHAL_CRYPTO_ENCRYPT) + ? AES_MODE_ENCRYPT : AES_MODE_DECRYPT; - if (remain >= 16) { - ReadBlock(base, out); - } else { - ReadBlock(base, block); - for (j = 0; j < remain; j++) - out[j] = block[j]; + whal_Reg_Update(base, AES_CR_REG, + AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, + whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, mode) | + whal_SetBits(AES_CR_GCMPH_Msk, AES_CR_GCMPH_Pos, + AES_GCMPH_PAYLOAD)); + + if (args->aadSz == 0) + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); + + for (i = 0; i < args->sz; i += 16) { + const uint8_t *in = args->in + i; + uint8_t *out = args->out + i; + size_t remain = args->sz - i; + uint8_t block[16] = {0}; + size_t j; + + if (remain >= 16) { + WriteBlock(base, in); + } else { + if (mode == AES_MODE_ENCRYPT) { + whal_Reg_Update(base, AES_CR_REG, AES_CR_NPBLB_Msk, + whal_SetBits(AES_CR_NPBLB_Msk, AES_CR_NPBLB_Pos, 16 - remain)); } + for (j = 0; j < remain; j++) + block[j] = in[j]; + WriteBlock(base, block); + } + + err = WaitForCCF(base, cfg->timeout); + if (err) { + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return err; + } + + if (remain >= 16) { + ReadBlock(base, out); + } else { + ReadBlock(base, block); + for (j = 0; j < remain; j++) + out[j] = block[j]; } } - /* --- Final phase: compute tag --- */ + return WHAL_SUCCESS; +} + +static whal_Error EndOp_AesGcm(whal_Crypto *cryptoDev, void *opArgs) +{ + whal_Crypto_AesGcmArgs *args = (whal_Crypto_AesGcmArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; + whal_Error err; + uint8_t tagBuf[16]; + size_t i; + whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, @@ -543,7 +504,6 @@ whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs) if (args->aadSz == 0 && args->sz == 0) whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* Write bit-length block: aadSz*8 (64-bit) || sz*8 (64-bit) */ whal_Reg_Write(base, AES_DINR_REG, 0); whal_Reg_Write(base, AES_DINR_REG, (uint32_t)(args->aadSz * 8)); whal_Reg_Write(base, AES_DINR_REG, 0); @@ -553,42 +513,35 @@ whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs) if (err) goto cleanup; - /* Read tag from DOUTR */ ReadBlock(base, tagBuf); for (i = 0; i < args->tagSz; i++) args->tag[i] = tagBuf[i]; cleanup: - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); return err; } -whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs) +static whal_Error StartOp_AesGmac(whal_Crypto *cryptoDev, void *opArgs) { - whal_Error err = WHAL_SUCCESS; - whal_Crypto_AesGmacArgs *args; - const whal_Stm32wbAes_Cfg *cfg; - size_t base; + whal_Error err; + whal_Crypto_AesGmacArgs *args = (whal_Crypto_AesGmacArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; size_t keySizeBit; size_t i; - uint8_t tagBuf[16]; - - if (!cryptoDev || !opArgs) - return WHAL_EINVAL; - - args = (whal_Crypto_AesGmacArgs *)opArgs; if (!args->key || !args->iv || !args->tag) return WHAL_EINVAL; if (args->keySz != 16 && args->keySz != 32) - return WHAL_EINVAL; + return WHAL_ENOTSUP; if (args->ivSz != 12) - return WHAL_EINVAL; + return WHAL_ENOTSUP; if (args->aadSz > 0 && !args->aad) return WHAL_EINVAL; @@ -596,18 +549,14 @@ whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs) if (args->tagSz == 0 || args->tagSz > 16) return WHAL_EINVAL; - cfg = (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; - base = cryptoDev->regmap.base; keySizeBit = (args->keySz == 32) ? 1 : 0; - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - /* --- Init phase --- */ whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_CHMOD_Msk | AES_CR_CHMOD2_Msk | AES_CR_DATATYPE_Msk | AES_CR_KEYSIZE_Msk | - AES_CR_GCMPH_Msk, + AES_CR_GCMPH_Msk | AES_CR_NPBLB_Msk, whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, AES_MODE_ENCRYPT) | whal_SetBits(AES_CR_CHMOD_Msk, AES_CR_CHMOD_Pos, @@ -621,20 +570,17 @@ whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs) WriteKey(base, args->key, args->keySz); - /* Write IV: 12 bytes nonce, counter=0x00000002 */ whal_Reg_Write(base, AES_IVR3_REG, whal_LoadBe32(args->iv)); whal_Reg_Write(base, AES_IVR2_REG, whal_LoadBe32(args->iv + 4)); whal_Reg_Write(base, AES_IVR1_REG, whal_LoadBe32(args->iv + 8)); whal_Reg_Write(base, AES_IVR0_REG, 0x00000002); - /* Enable — init phase runs, EN auto-clears */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); err = WaitForCCF(base, cfg->timeout); if (err) goto cleanup; - /* --- Header phase: process AAD --- */ if (args->aadSz > 0) { whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, @@ -665,7 +611,23 @@ whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs) } } - /* --- Final phase: compute tag (skip payload for GMAC) --- */ + return WHAL_SUCCESS; + +cleanup: + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return err; +} + +static whal_Error EndOp_AesGmac(whal_Crypto *cryptoDev, void *opArgs) +{ + whal_Crypto_AesGmacArgs *args = (whal_Crypto_AesGmacArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; + whal_Error err; + uint8_t tagBuf[16]; + size_t i; + whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, @@ -676,7 +638,6 @@ whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs) if (args->aadSz == 0) whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* Write bit-length block: aadSz*8 (64-bit) || 0 (64-bit) */ whal_Reg_Write(base, AES_DINR_REG, 0); whal_Reg_Write(base, AES_DINR_REG, (uint32_t)(args->aadSz * 8)); whal_Reg_Write(base, AES_DINR_REG, 0); @@ -686,42 +647,33 @@ whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs) if (err) goto cleanup; - /* Read tag from DOUTR */ ReadBlock(base, tagBuf); for (i = 0; i < args->tagSz; i++) args->tag[i] = tagBuf[i]; cleanup: - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); return err; } -whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) +static whal_Error StartOp_AesCcm(whal_Crypto *cryptoDev, void *opArgs) { - whal_Error err = WHAL_SUCCESS; - whal_Crypto_AesCcmArgs *args; - const whal_Stm32wbAes_Cfg *cfg; - size_t base; - size_t mode; + whal_Error err; + whal_Crypto_AesCcmArgs *args = (whal_Crypto_AesCcmArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; size_t keySizeBit; size_t i; uint8_t b0[16]; - uint8_t block[16]; - uint8_t tagBuf[16]; - - if (!cryptoDev || !opArgs) - return WHAL_EINVAL; - - args = (whal_Crypto_AesCcmArgs *)opArgs; if (!args->key || !args->nonce || !args->tag) return WHAL_EINVAL; if (args->keySz != 16 && args->keySz != 32) - return WHAL_EINVAL; + return WHAL_ENOTSUP; if (args->nonceSz < 7 || args->nonceSz > 13) return WHAL_EINVAL; @@ -735,18 +687,8 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) if (args->tagSz < 4 || args->tagSz > 16 || (args->tagSz & 1) != 0) return WHAL_EINVAL; - cfg = (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; - base = cryptoDev->regmap.base; keySizeBit = (args->keySz == 32) ? 1 : 0; - mode = (args->dir == WHAL_CRYPTO_ENCRYPT) - ? AES_MODE_ENCRYPT : AES_MODE_DECRYPT; - - /* - * Build B0 block per RFC 3610: - * Flags = 8*(Adata?1:0) + 8*((t-2)/2) + (q-1) - * where q = 15 - nonceSz, t = tagSz - */ { size_t q = 15 - args->nonceSz; size_t t = args->tagSz; @@ -757,7 +699,6 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) for (i = 0; i < args->nonceSz; i++) b0[1 + i] = args->nonce[i]; - /* Encode message length in q bytes, big-endian */ { size_t msgLen = args->sz; size_t j; @@ -768,15 +709,12 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) } } - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); - /* --- Init phase: load B0 into IVRx --- */ - /* CCM: CHMOD[2:0] = 100, so CHMOD[1:0]=00 and CHMOD[2]=1 */ whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_CHMOD_Msk | AES_CR_CHMOD2_Msk | AES_CR_DATATYPE_Msk | AES_CR_KEYSIZE_Msk | - AES_CR_GCMPH_Msk, + AES_CR_GCMPH_Msk | AES_CR_NPBLB_Msk, whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, AES_MODE_ENCRYPT) | whal_SetBits(AES_CR_CHMOD_Msk, AES_CR_CHMOD_Pos, 0) | @@ -791,14 +729,12 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) WriteKey(base, args->key, args->keySz); WriteIv(base, b0); - /* Enable — init phase runs, EN auto-clears */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); err = WaitForCCF(base, cfg->timeout); if (err) goto cleanup; - /* --- Header phase: process AAD with length prefix --- */ if (args->aadSz > 0) { whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, @@ -809,37 +745,27 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* - * B1 block: 2-byte length prefix followed by AAD data. - * For aadSz < 65280, prefix is just 2 bytes. - * Remaining AAD continues in subsequent blocks. - */ { uint8_t hdrBuf[16] = {0}; size_t hdrOff = 0; size_t aadOff = 0; size_t j; - /* 2-byte length prefix */ hdrBuf[0] = (uint8_t)(args->aadSz >> 8); hdrBuf[1] = (uint8_t)(args->aadSz); hdrOff = 2; - /* Fill rest of first block with AAD */ while (hdrOff < 16 && aadOff < args->aadSz) { hdrBuf[hdrOff++] = args->aad[aadOff++]; } - /* Write first block */ WriteBlock(base, hdrBuf); err = WaitForCCF(base, cfg->timeout); if (err) goto cleanup; - /* Process remaining AAD in 16-byte blocks */ while (aadOff < args->aadSz) { - for (j = 0; j < 16; j++) - block[j] = 0; + uint8_t block[16] = {0}; for (j = 0; j < 16 && aadOff < args->aadSz; j++) block[j] = args->aad[aadOff++]; @@ -852,48 +778,88 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) } } - /* --- Payload phase --- */ - if (args->sz > 0) { - whal_Reg_Update(base, AES_CR_REG, - AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, - whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, mode) | - whal_SetBits(AES_CR_GCMPH_Msk, AES_CR_GCMPH_Pos, - AES_GCMPH_PAYLOAD)); + return WHAL_SUCCESS; - if (args->aadSz == 0) - whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); +cleanup: + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return err; +} - for (i = 0; i < args->sz; i += 16) { - const uint8_t *in = args->in + i; - uint8_t *out = args->out + i; - size_t remain = args->sz - i; - size_t j; +static whal_Error Process_AesCcm(whal_Crypto *cryptoDev, void *opArgs) +{ + whal_Crypto_AesCcmArgs *args = (whal_Crypto_AesCcmArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; + size_t mode; + whal_Error err; + size_t i; - if (remain >= 16) { - WriteBlock(base, in); - } else { - for (j = 0; j < 16; j++) - block[j] = 0; - for (j = 0; j < remain; j++) - block[j] = in[j]; - WriteBlock(base, block); - } + if (args->sz == 0) + return WHAL_SUCCESS; - err = WaitForCCF(base, cfg->timeout); - if (err) - goto cleanup; + if (!args->in || !args->out) + return WHAL_EINVAL; - if (remain >= 16) { - ReadBlock(base, out); - } else { - ReadBlock(base, block); - for (j = 0; j < remain; j++) - out[j] = block[j]; + mode = (args->dir == WHAL_CRYPTO_ENCRYPT) + ? AES_MODE_ENCRYPT : AES_MODE_DECRYPT; + + whal_Reg_Update(base, AES_CR_REG, + AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, + whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, mode) | + whal_SetBits(AES_CR_GCMPH_Msk, AES_CR_GCMPH_Pos, + AES_GCMPH_PAYLOAD)); + + if (args->aadSz == 0) + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); + + for (i = 0; i < args->sz; i += 16) { + const uint8_t *in = args->in + i; + uint8_t *out = args->out + i; + size_t remain = args->sz - i; + uint8_t block[16] = {0}; + size_t j; + + if (remain >= 16) { + WriteBlock(base, in); + } else { + if (mode == AES_MODE_DECRYPT) { + whal_Reg_Update(base, AES_CR_REG, AES_CR_NPBLB_Msk, + whal_SetBits(AES_CR_NPBLB_Msk, AES_CR_NPBLB_Pos, 16 - remain)); } + for (j = 0; j < remain; j++) + block[j] = in[j]; + WriteBlock(base, block); + } + + err = WaitForCCF(base, cfg->timeout); + if (err) { + whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); + return err; + } + + if (remain >= 16) { + ReadBlock(base, out); + } else { + ReadBlock(base, block); + for (j = 0; j < remain; j++) + out[j] = block[j]; } } - /* --- Final phase: compute/verify tag --- */ + return WHAL_SUCCESS; +} + +static whal_Error EndOp_AesCcm(whal_Crypto *cryptoDev, void *opArgs) +{ + whal_Crypto_AesCcmArgs *args = (whal_Crypto_AesCcmArgs *)opArgs; + const whal_Stm32wbAes_Cfg *cfg = + (const whal_Stm32wbAes_Cfg *)cryptoDev->cfg; + size_t base = cryptoDev->regmap.base; + whal_Error err; + uint8_t tagBuf[16]; + size_t i; + whal_Reg_Update(base, AES_CR_REG, AES_CR_MODE_Msk | AES_CR_GCMPH_Msk, whal_SetBits(AES_CR_MODE_Msk, AES_CR_MODE_Pos, @@ -904,7 +870,6 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) if (args->aadSz == 0 && args->sz == 0) whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, AES_CR_EN_Msk); - /* Write zeros to DINR for final phase */ whal_Reg_Write(base, AES_DINR_REG, 0); whal_Reg_Write(base, AES_DINR_REG, 0); whal_Reg_Write(base, AES_DINR_REG, 0); @@ -914,22 +879,102 @@ whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs) if (err) goto cleanup; - /* Read tag from DOUTR */ ReadBlock(base, tagBuf); for (i = 0; i < args->tagSz; i++) args->tag[i] = tagBuf[i]; cleanup: - /* Disable AES */ whal_Reg_Update(base, AES_CR_REG, AES_CR_EN_Msk, 0); return err; } + + + +whal_Error whal_Stm32wbAes_StartOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs) +{ + if (!cryptoDev || !opArgs) + return WHAL_EINVAL; + + switch (opId) { + case WHAL_CRYPTO_AES_ECB: + return StartOp_AesEcb(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_CBC: + return StartOp_AesCbc(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_CTR: + return StartOp_AesCtr(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_GCM: + return StartOp_AesGcm(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_GMAC: + return StartOp_AesGmac(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_CCM: + return StartOp_AesCcm(cryptoDev, opArgs); + default: + return WHAL_EINVAL; + } +} + +whal_Error whal_Stm32wbAes_Process(whal_Crypto *cryptoDev, size_t opId, + void *opArgs) +{ + if (!cryptoDev || !opArgs) + return WHAL_EINVAL; + + switch (opId) { + case WHAL_CRYPTO_AES_ECB: { + whal_Crypto_AesEcbArgs *args = (whal_Crypto_AesEcbArgs *)opArgs; + return Process_BlockCipher(cryptoDev, args->in, args->out, args->sz); + } + case WHAL_CRYPTO_AES_CBC: { + whal_Crypto_AesCbcArgs *args = (whal_Crypto_AesCbcArgs *)opArgs; + return Process_BlockCipher(cryptoDev, args->in, args->out, args->sz); + } + case WHAL_CRYPTO_AES_CTR: { + whal_Crypto_AesCtrArgs *args = (whal_Crypto_AesCtrArgs *)opArgs; + return Process_BlockCipher(cryptoDev, args->in, args->out, args->sz); + } + case WHAL_CRYPTO_AES_GCM: + return Process_AesGcm(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_GMAC: + return WHAL_SUCCESS; + case WHAL_CRYPTO_AES_CCM: + return Process_AesCcm(cryptoDev, opArgs); + default: + return WHAL_EINVAL; + } +} + +whal_Error whal_Stm32wbAes_EndOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs) +{ + if (!cryptoDev || !opArgs) + return WHAL_EINVAL; + + switch (opId) { + case WHAL_CRYPTO_AES_ECB: + case WHAL_CRYPTO_AES_CBC: + case WHAL_CRYPTO_AES_CTR: + return EndOp_BlockCipher(cryptoDev); + case WHAL_CRYPTO_AES_GCM: + return EndOp_AesGcm(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_GMAC: + return EndOp_AesGmac(cryptoDev, opArgs); + case WHAL_CRYPTO_AES_CCM: + return EndOp_AesCcm(cryptoDev, opArgs); + default: + return WHAL_EINVAL; + } +} + #ifndef WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES const whal_CryptoDriver whal_Stm32wbAes_Driver = { .Init = whal_Stm32wbAes_Init, .Deinit = whal_Stm32wbAes_Deinit, + .StartOp = whal_Stm32wbAes_StartOp, + .Process = whal_Stm32wbAes_Process, + .EndOp = whal_Stm32wbAes_EndOp, }; #endif /* !WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES */ diff --git a/src/dma/stm32wb_dma.c b/src/dma/stm32wb_dma.c index d7fbb48..80bb887 100644 --- a/src/dma/stm32wb_dma.c +++ b/src/dma/stm32wb_dma.c @@ -337,6 +337,9 @@ void whal_Stm32wbDma_IRQHandler(whal_Dma *dmaDev, size_t ch, size_t hw_ch; size_t isr; + if (!dmaDev) + return; + base = dmaDev->regmap.base; hw_ch = ch + 1; diff --git a/src/flash/flash.c b/src/flash/flash.c index 28b2ca5..b80f1e7 100644 --- a/src/flash/flash.c +++ b/src/flash/flash.c @@ -7,7 +7,7 @@ inline whal_Error whal_Flash_Init(whal_Flash *flashDev) if (!flashDev) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Init(flashDev); } @@ -17,7 +17,7 @@ inline whal_Error whal_Flash_Deinit(whal_Flash *flashDev) if (!flashDev) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Deinit(flashDev); } @@ -27,7 +27,7 @@ inline whal_Error whal_Flash_Lock(whal_Flash *flashDev, size_t addr, size_t len) if (!flashDev) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Lock) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Lock(flashDev, addr, len); } @@ -37,7 +37,7 @@ inline whal_Error whal_Flash_Unlock(whal_Flash *flashDev, size_t addr, size_t le if (!flashDev) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Unlock) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Unlock(flashDev, addr, len); } @@ -48,7 +48,7 @@ inline whal_Error whal_Flash_Read(whal_Flash *flashDev, size_t addr, void *data, if (!flashDev || !data) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Read) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Read(flashDev, addr, data, dataSz); } @@ -59,7 +59,7 @@ inline whal_Error whal_Flash_Write(whal_Flash *flashDev, size_t addr, const void if (!flashDev || !data) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Write) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Write(flashDev, addr, data, dataSz); } @@ -70,7 +70,7 @@ inline whal_Error whal_Flash_Erase(whal_Flash *flashDev, size_t addr, if (!flashDev) return WHAL_EINVAL; if (!flashDev->driver || !flashDev->driver->Erase) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return flashDev->driver->Erase(flashDev, addr, dataSz); } diff --git a/src/flash/stm32wb_flash.c b/src/flash/stm32wb_flash.c index 0c16c45..b221541 100644 --- a/src/flash/stm32wb_flash.c +++ b/src/flash/stm32wb_flash.c @@ -100,14 +100,18 @@ whal_Error whal_Stm32wbFlash_Init(whal_Flash *flashDev) { - (void)flashDev; + if (!flashDev) { + return WHAL_EINVAL; + } return WHAL_SUCCESS; } whal_Error whal_Stm32wbFlash_Deinit(whal_Flash *flashDev) { - (void)flashDev; + if (!flashDev) { + return WHAL_EINVAL; + } return WHAL_SUCCESS; } diff --git a/src/gpio/gpio.c b/src/gpio/gpio.c index 2107be9..133976a 100644 --- a/src/gpio/gpio.c +++ b/src/gpio/gpio.c @@ -6,7 +6,7 @@ inline whal_Error whal_Gpio_Init(whal_Gpio *gpioDev) if (!gpioDev) return WHAL_EINVAL; if (!gpioDev->driver || !gpioDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return gpioDev->driver->Init(gpioDev); } @@ -16,7 +16,7 @@ inline whal_Error whal_Gpio_Deinit(whal_Gpio *gpioDev) if (!gpioDev) return WHAL_EINVAL; if (!gpioDev->driver || !gpioDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return gpioDev->driver->Deinit(gpioDev); } @@ -26,7 +26,7 @@ inline whal_Error whal_Gpio_Get(whal_Gpio *gpioDev, size_t pin, size_t *value) if (!gpioDev || !value) return WHAL_EINVAL; if (!gpioDev->driver || !gpioDev->driver->Get) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return gpioDev->driver->Get(gpioDev, pin, value); } @@ -36,7 +36,7 @@ inline whal_Error whal_Gpio_Set(whal_Gpio *gpioDev, size_t pin, size_t value) if (!gpioDev) return WHAL_EINVAL; if (!gpioDev->driver || !gpioDev->driver->Set) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return gpioDev->driver->Set(gpioDev, pin, value); } diff --git a/src/gpio/stm32wb_gpio.c b/src/gpio/stm32wb_gpio.c index 4bbb1f3..782252d 100644 --- a/src/gpio/stm32wb_gpio.c +++ b/src/gpio/stm32wb_gpio.c @@ -119,7 +119,9 @@ whal_Error whal_Stm32wbGpio_Init(whal_Gpio *gpioDev) whal_Error whal_Stm32wbGpio_Deinit(whal_Gpio *gpioDev) { - (void)gpioDev; + if (!gpioDev) { + return WHAL_EINVAL; + } return WHAL_SUCCESS; } @@ -138,7 +140,7 @@ static whal_Error whal_Stm32wbGpio_SetOrGet(whal_Gpio *gpioDev, size_t idx, uint8_t port, pin; size_t portBase, mask; - if (!gpioDev || !gpioDev->cfg) { + if (!gpioDev || !gpioDev->cfg || !value) { return WHAL_EINVAL; } diff --git a/src/rng/rng.c b/src/rng/rng.c index df18d97..e953760 100644 --- a/src/rng/rng.c +++ b/src/rng/rng.c @@ -7,7 +7,7 @@ inline whal_Error whal_Rng_Init(whal_Rng *rngDev) if (!rngDev) return WHAL_EINVAL; if (!rngDev->driver || !rngDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return rngDev->driver->Init(rngDev); } @@ -17,7 +17,7 @@ inline whal_Error whal_Rng_Deinit(whal_Rng *rngDev) if (!rngDev) return WHAL_EINVAL; if (!rngDev->driver || !rngDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return rngDev->driver->Deinit(rngDev); } @@ -27,7 +27,7 @@ inline whal_Error whal_Rng_Generate(whal_Rng *rngDev, void *rngData, size_t rngD if (!rngDev || !rngData) return WHAL_EINVAL; if (!rngDev->driver || !rngDev->driver->Generate) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return rngDev->driver->Generate(rngDev, rngData, rngDataSz); } diff --git a/src/spi/spi.c b/src/spi/spi.c index 0394b76..fd4b81f 100644 --- a/src/spi/spi.c +++ b/src/spi/spi.c @@ -7,7 +7,7 @@ inline whal_Error whal_Spi_Init(whal_Spi *spiDev) if (!spiDev) return WHAL_EINVAL; if (!spiDev->driver || !spiDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return spiDev->driver->Init(spiDev); } @@ -17,7 +17,7 @@ inline whal_Error whal_Spi_Deinit(whal_Spi *spiDev) if (!spiDev) return WHAL_EINVAL; if (!spiDev->driver || !spiDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return spiDev->driver->Deinit(spiDev); } @@ -27,7 +27,7 @@ inline whal_Error whal_Spi_StartCom(whal_Spi *spiDev, whal_Spi_ComCfg *comCfg) if (!spiDev || !comCfg) return WHAL_EINVAL; if (!spiDev->driver || !spiDev->driver->StartCom) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return spiDev->driver->StartCom(spiDev, comCfg); } @@ -37,7 +37,7 @@ inline whal_Error whal_Spi_EndCom(whal_Spi *spiDev) if (!spiDev) return WHAL_EINVAL; if (!spiDev->driver || !spiDev->driver->EndCom) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return spiDev->driver->EndCom(spiDev); } @@ -47,7 +47,7 @@ inline whal_Error whal_Spi_SendRecv(whal_Spi *spiDev, const void *tx, size_t txL if (!spiDev) return WHAL_EINVAL; if (!spiDev->driver || !spiDev->driver->SendRecv) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return spiDev->driver->SendRecv(spiDev, tx, txLen, rx, rxLen); } diff --git a/src/timer/systick.c b/src/timer/systick.c index f4df8d3..48e3f91 100644 --- a/src/timer/systick.c +++ b/src/timer/systick.c @@ -31,12 +31,14 @@ whal_Error whal_SysTick_Init(whal_Timer *timerDev) { whal_SysTick_Cfg *cfg; - const whal_Regmap *reg = &timerDev->regmap; + const whal_Regmap *reg; if (!timerDev || !timerDev->cfg) { return WHAL_EINVAL; } + reg = &timerDev->regmap; + cfg = (whal_SysTick_Cfg *)timerDev->cfg; whal_Reg_Update(reg->base, SYSTICK_CSR_REG, @@ -53,17 +55,23 @@ whal_Error whal_SysTick_Init(whal_Timer *timerDev) whal_Error whal_SysTick_Deinit(whal_Timer *timerDev) { + if (!timerDev) { + return WHAL_EINVAL; + } + return WHAL_SUCCESS; } whal_Error whal_SysTick_Start(whal_Timer *timerDev) { - const whal_Regmap *reg = &timerDev->regmap; + const whal_Regmap *reg; if (!timerDev || !timerDev->cfg) { return WHAL_EINVAL; } + reg = &timerDev->regmap; + whal_Reg_Update(reg->base, SYSTICK_CSR_REG, SYSTICK_CSR_ENABLE_Msk, whal_SetBits(SYSTICK_CSR_ENABLE_Msk, SYSTICK_CSR_ENABLE_Pos, 1)); @@ -72,12 +80,14 @@ whal_Error whal_SysTick_Start(whal_Timer *timerDev) whal_Error whal_SysTick_Stop(whal_Timer *timerDev) { - const whal_Regmap *reg = &timerDev->regmap; + const whal_Regmap *reg; if (!timerDev || !timerDev->cfg) { return WHAL_EINVAL; } + reg = &timerDev->regmap; + whal_Reg_Update(reg->base, SYSTICK_CSR_REG, SYSTICK_CSR_ENABLE_Msk, whal_SetBits(SYSTICK_CSR_ENABLE_Msk, SYSTICK_CSR_ENABLE_Pos, 0)); @@ -86,6 +96,9 @@ whal_Error whal_SysTick_Stop(whal_Timer *timerDev) whal_Error whal_SysTick_Reset(whal_Timer *timerDev) { + if (!timerDev) { + return WHAL_EINVAL; + } return WHAL_SUCCESS; } diff --git a/src/timer/timer.c b/src/timer/timer.c index c8ef860..9b86869 100644 --- a/src/timer/timer.c +++ b/src/timer/timer.c @@ -8,7 +8,7 @@ inline whal_Error whal_Timer_Init(whal_Timer *timerDev) if (!timerDev) return WHAL_EINVAL; if (!timerDev->driver || !timerDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return timerDev->driver->Init(timerDev); } @@ -18,7 +18,7 @@ inline whal_Error whal_Timer_Deinit(whal_Timer *timerDev) if (!timerDev) return WHAL_EINVAL; if (!timerDev->driver || !timerDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return timerDev->driver->Deinit(timerDev); } @@ -28,7 +28,7 @@ inline whal_Error whal_Timer_Start(whal_Timer *timerDev) if (!timerDev) return WHAL_EINVAL; if (!timerDev->driver || !timerDev->driver->Start) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return timerDev->driver->Start(timerDev); } @@ -38,7 +38,7 @@ inline whal_Error whal_Timer_Stop(whal_Timer *timerDev) if (!timerDev) return WHAL_EINVAL; if (!timerDev->driver || !timerDev->driver->Stop) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return timerDev->driver->Stop(timerDev); } @@ -48,7 +48,7 @@ inline whal_Error whal_Timer_Reset(whal_Timer *timerDev) if (!timerDev) return WHAL_EINVAL; if (!timerDev->driver || !timerDev->driver->Reset) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return timerDev->driver->Reset(timerDev); } diff --git a/src/uart/pic32cz_uart.c b/src/uart/pic32cz_uart.c index c87ded4..2d47b09 100644 --- a/src/uart/pic32cz_uart.c +++ b/src/uart/pic32cz_uart.c @@ -365,7 +365,7 @@ whal_Error whal_Pic32czUart_SendAsync(whal_Uart *uartDev, const void *data, size (void)dataSz; if (!uartDev || !data) return WHAL_EINVAL; - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; } whal_Error whal_Pic32czUart_RecvAsync(whal_Uart *uartDev, void *data, size_t dataSz) @@ -373,7 +373,7 @@ whal_Error whal_Pic32czUart_RecvAsync(whal_Uart *uartDev, void *data, size_t dat (void)dataSz; if (!uartDev || !data) return WHAL_EINVAL; - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; } #ifndef WHAL_CFG_UART_API_MAPPING_PIC32CZ diff --git a/src/uart/stm32f4_uart.c b/src/uart/stm32f4_uart.c index d35e485..de95200 100644 --- a/src/uart/stm32f4_uart.c +++ b/src/uart/stm32f4_uart.c @@ -171,7 +171,7 @@ whal_Error whal_Stm32f4Uart_SendAsync(whal_Uart *uartDev, const void *data, size (void)dataSz; if (!uartDev || !data) return WHAL_EINVAL; - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; } whal_Error whal_Stm32f4Uart_RecvAsync(whal_Uart *uartDev, void *data, size_t dataSz) @@ -179,7 +179,7 @@ whal_Error whal_Stm32f4Uart_RecvAsync(whal_Uart *uartDev, void *data, size_t dat (void)dataSz; if (!uartDev || !data) return WHAL_EINVAL; - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; } #ifndef WHAL_CFG_UART_API_MAPPING_STM32F4 diff --git a/src/uart/stm32wb_uart.c b/src/uart/stm32wb_uart.c index 6789872..70c9592 100644 --- a/src/uart/stm32wb_uart.c +++ b/src/uart/stm32wb_uart.c @@ -166,7 +166,7 @@ whal_Error whal_Stm32wbUart_SendAsync(whal_Uart *uartDev, const void *data, size (void)dataSz; if (!uartDev || !data) return WHAL_EINVAL; - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; } whal_Error whal_Stm32wbUart_RecvAsync(whal_Uart *uartDev, void *data, size_t dataSz) @@ -174,7 +174,7 @@ whal_Error whal_Stm32wbUart_RecvAsync(whal_Uart *uartDev, void *data, size_t dat (void)dataSz; if (!uartDev || !data) return WHAL_EINVAL; - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; } #if !defined(WHAL_CFG_UART_API_MAPPING_STM32WB) && \ diff --git a/src/uart/uart.c b/src/uart/uart.c index 8ed7a5b..d34d64f 100644 --- a/src/uart/uart.c +++ b/src/uart/uart.c @@ -7,7 +7,7 @@ inline whal_Error whal_Uart_Init(whal_Uart *uartDev) if (!uartDev) return WHAL_EINVAL; if (!uartDev->driver || !uartDev->driver->Init) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return uartDev->driver->Init(uartDev); } @@ -17,7 +17,7 @@ inline whal_Error whal_Uart_Deinit(whal_Uart *uartDev) if (!uartDev) return WHAL_EINVAL; if (!uartDev->driver || !uartDev->driver->Deinit) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return uartDev->driver->Deinit(uartDev); } @@ -27,7 +27,7 @@ inline whal_Error whal_Uart_Send(whal_Uart *uartDev, const void *data, size_t da if (!uartDev || !data) return WHAL_EINVAL; if (!uartDev->driver || !uartDev->driver->Send) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return uartDev->driver->Send(uartDev, data, dataSz); } @@ -37,7 +37,7 @@ inline whal_Error whal_Uart_Recv(whal_Uart *uartDev, void *data, size_t dataSz) if (!uartDev || !data) return WHAL_EINVAL; if (!uartDev->driver || !uartDev->driver->Recv) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return uartDev->driver->Recv(uartDev, data, dataSz); } @@ -47,7 +47,7 @@ inline whal_Error whal_Uart_SendAsync(whal_Uart *uartDev, const void *data, size if (!uartDev || !data) return WHAL_EINVAL; if (!uartDev->driver || !uartDev->driver->SendAsync) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return uartDev->driver->SendAsync(uartDev, data, dataSz); } @@ -57,7 +57,7 @@ inline whal_Error whal_Uart_RecvAsync(whal_Uart *uartDev, void *data, size_t dat if (!uartDev || !data) return WHAL_EINVAL; if (!uartDev->driver || !uartDev->driver->RecvAsync) - return WHAL_ENOTIMPL; + return WHAL_ENOTSUP; return uartDev->driver->RecvAsync(uartDev, data, dataSz); } diff --git a/src/watchdog/stm32wb_iwdg.c b/src/watchdog/stm32wb_iwdg.c index ecb08d5..c95ef2c 100644 --- a/src/watchdog/stm32wb_iwdg.c +++ b/src/watchdog/stm32wb_iwdg.c @@ -84,7 +84,10 @@ whal_Error whal_Stm32wbIwdg_Init(whal_Watchdog *wdgDev) whal_Error whal_Stm32wbIwdg_Deinit(whal_Watchdog *wdgDev) { - (void)wdgDev; + if (!wdgDev) { + return WHAL_EINVAL; + } + return WHAL_SUCCESS; } diff --git a/src/watchdog/stm32wb_wwdg.c b/src/watchdog/stm32wb_wwdg.c index 55eede6..9598fb0 100644 --- a/src/watchdog/stm32wb_wwdg.c +++ b/src/watchdog/stm32wb_wwdg.c @@ -59,7 +59,10 @@ whal_Error whal_Stm32wbWwdg_Init(whal_Watchdog *wdgDev) whal_Error whal_Stm32wbWwdg_Deinit(whal_Watchdog *wdgDev) { - (void)wdgDev; + if (!wdgDev) { + return WHAL_EINVAL; + } + return WHAL_SUCCESS; } diff --git a/tests/core/test_dispatch.c b/tests/core/test_dispatch.c index 5385b7f..0205dc4 100644 --- a/tests/core/test_dispatch.c +++ b/tests/core/test_dispatch.c @@ -108,26 +108,34 @@ static void Test_Clock_NullDev(void) WHAL_ASSERT_EQ(whal_Clock_Disable(NULL, NULL), WHAL_EINVAL); } +static void Test_Clock_NullClk(void) +{ + whal_Clock dev = { .driver = &mockClockDriver }; + WHAL_ASSERT_EQ(whal_Clock_Enable(&dev, NULL), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Clock_Disable(&dev, NULL), WHAL_EINVAL); +} + static void Test_Clock_NullDriver(void) { whal_Clock dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Clock_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Clock_Init(&dev), WHAL_ENOTSUP); } static void Test_Clock_NullVtableEntry(void) { static const whal_ClockDriver emptyDriver = { 0 }; whal_Clock dev = { .driver = &emptyDriver }; - WHAL_ASSERT_EQ(whal_Clock_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Clock_Init(&dev), WHAL_ENOTSUP); } static void Test_Clock_ValidDispatch(void) { + int dummy; whal_Clock dev = { .driver = &mockClockDriver }; WHAL_ASSERT_EQ(whal_Clock_Init(&dev), WHAL_SUCCESS); WHAL_ASSERT_EQ(whal_Clock_Deinit(&dev), WHAL_SUCCESS); - WHAL_ASSERT_EQ(whal_Clock_Enable(&dev, NULL), WHAL_SUCCESS); - WHAL_ASSERT_EQ(whal_Clock_Disable(&dev, NULL), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Clock_Enable(&dev, &dummy), WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Clock_Disable(&dev, &dummy), WHAL_SUCCESS); } /* --- GPIO dispatch tests --- */ @@ -143,7 +151,7 @@ static void Test_Gpio_NullDev(void) static void Test_Gpio_NullDriver(void) { whal_Gpio dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Gpio_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Gpio_Init(&dev), WHAL_ENOTSUP); } static void Test_Gpio_ValidDispatch(void) @@ -171,15 +179,15 @@ static void Test_Uart_NullDev(void) static void Test_Uart_NullDriver(void) { whal_Uart dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Uart_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Uart_Init(&dev), WHAL_ENOTSUP); } static void Test_Uart_NullAsyncVtable(void) { whal_Uart dev = { .driver = &mockUartDriver }; uint8_t buf[1] = {0}; - WHAL_ASSERT_EQ(whal_Uart_SendAsync(&dev, buf, 1), WHAL_ENOTIMPL); - WHAL_ASSERT_EQ(whal_Uart_RecvAsync(&dev, buf, 1), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Uart_SendAsync(&dev, buf, 1), WHAL_ENOTSUP); + WHAL_ASSERT_EQ(whal_Uart_RecvAsync(&dev, buf, 1), WHAL_ENOTSUP); } static void Test_Uart_ValidDispatch(void) @@ -211,7 +219,7 @@ static void Test_Flash_NullDev(void) static void Test_Flash_NullDriver(void) { whal_Flash dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Flash_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Flash_Init(&dev), WHAL_ENOTSUP); } static void Test_Flash_ValidDispatch(void) @@ -239,7 +247,7 @@ static void Test_Timer_NullDev(void) static void Test_Timer_NullDriver(void) { whal_Timer dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Timer_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Timer_Init(&dev), WHAL_ENOTSUP); } static void Test_Timer_ValidDispatch(void) @@ -264,7 +272,7 @@ static void Test_Rng_NullDev(void) static void Test_Rng_NullDriver(void) { whal_Rng dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Rng_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Rng_Init(&dev), WHAL_ENOTSUP); } static void Test_Rng_ValidDispatch(void) @@ -306,7 +314,7 @@ static void Test_Spi_NullDev(void) static void Test_Spi_NullDriver(void) { whal_Spi dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Spi_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Spi_Init(&dev), WHAL_ENOTSUP); } static void Test_Spi_ValidDispatch(void) @@ -350,7 +358,7 @@ static void Test_Block_NullDev(void) static void Test_Block_NullDriver(void) { whal_Block dev = { .driver = NULL }; - WHAL_ASSERT_EQ(whal_Block_Init(&dev), WHAL_ENOTIMPL); + WHAL_ASSERT_EQ(whal_Block_Init(&dev), WHAL_ENOTSUP); } static void Test_Block_ValidDispatch(void) @@ -370,6 +378,7 @@ void whal_Test_Dispatch(void) WHAL_TEST(Test_Clock_NullDev); WHAL_TEST(Test_Clock_NullDriver); WHAL_TEST(Test_Clock_NullVtableEntry); + WHAL_TEST(Test_Clock_NullClk); WHAL_TEST(Test_Clock_ValidDispatch); WHAL_TEST(Test_Gpio_NullDev); WHAL_TEST(Test_Gpio_NullDriver); diff --git a/tests/crypto/test_crypto.c b/tests/crypto/test_crypto.c index 4990b99..288023a 100644 --- a/tests/crypto/test_crypto.c +++ b/tests/crypto/test_crypto.c @@ -113,6 +113,41 @@ static const uint8_t gcmTag[16] = { 0xEC, 0x1A, 0x50, 0x22, 0x70, 0xE3, 0xCC, 0x6C, }; +/* GCM spec Test Case 16: AES-256-GCM, 60-byte payload, 20-byte AAD. + * Exercises partial last blocks on both AAD and payload. Reuses gcmKey/gcmIv. */ +static const uint8_t gcm16Pt[60] = { + 0xD9, 0x31, 0x32, 0x25, 0xF8, 0x84, 0x06, 0xE5, + 0xA5, 0x59, 0x09, 0xC5, 0xAF, 0xF5, 0x26, 0x9A, + 0x86, 0xA7, 0xA9, 0x53, 0x15, 0x34, 0xF7, 0xDA, + 0x2E, 0x4C, 0x30, 0x3D, 0x8A, 0x31, 0x8A, 0x72, + 0x1C, 0x3C, 0x0C, 0x95, 0x95, 0x68, 0x09, 0x53, + 0x2F, 0xCF, 0x0E, 0x24, 0x49, 0xA6, 0xB5, 0x25, + 0xB1, 0x6A, 0xED, 0xF5, 0xAA, 0x0D, 0xE6, 0x57, + 0xBA, 0x63, 0x7B, 0x39, +}; + +static const uint8_t gcm16Aad[20] = { + 0xFE, 0xED, 0xFA, 0xCE, 0xDE, 0xAD, 0xBE, 0xEF, + 0xFE, 0xED, 0xFA, 0xCE, 0xDE, 0xAD, 0xBE, 0xEF, + 0xAB, 0xAD, 0xDA, 0xD2, +}; + +static const uint8_t gcm16Ct[60] = { + 0x52, 0x2D, 0xC1, 0xF0, 0x99, 0x56, 0x7D, 0x07, + 0xF4, 0x7F, 0x37, 0xA3, 0x2A, 0x84, 0x42, 0x7D, + 0x64, 0x3A, 0x8C, 0xDC, 0xBF, 0xE5, 0xC0, 0xC9, + 0x75, 0x98, 0xA2, 0xBD, 0x25, 0x55, 0xD1, 0xAA, + 0x8C, 0xB0, 0x8E, 0x48, 0x59, 0x0D, 0xBB, 0x3D, + 0xA7, 0xB0, 0x8B, 0x10, 0x56, 0x82, 0x88, 0x38, + 0xC5, 0xF6, 0x1E, 0x63, 0x93, 0xBA, 0x7A, 0x0A, + 0xBC, 0xC9, 0xF6, 0x62, +}; + +static const uint8_t gcm16Tag[16] = { + 0x76, 0xFC, 0x6E, 0xCE, 0x0F, 0x4E, 0x17, 0x68, + 0xCD, 0xDF, 0x88, 0x53, 0xBB, 0x2D, 0x55, 0x1B, +}; + /* NIST CAVP gcmEncryptExtIV256.rsp: Keylen=256, IVlen=96, PTlen=0, AADlen=128, Taglen=128, Count=0 */ static const uint8_t gmacKey[32] = { 0x78, 0xDC, 0x4E, 0x0A, 0xAF, 0x52, 0xD9, 0x35, @@ -173,31 +208,31 @@ static const uint8_t ccmTag[16] = { 0x3C, 0xA5, 0x07, 0x95, 0xAC, 0xD9, 0x02, 0x03, }; -static int BoardHasOp(size_t op) -{ - return op < g_whalCrypto.opsCount && g_whalCrypto.ops[op] != 0; -} - static void Test_Crypto_AesEcb_Basic(void) { uint8_t ct[32] = {0}; uint8_t pt[32] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_ECB)) - WHAL_SKIP(); - whal_Crypto_AesEcbArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = key, .keySz = 32, .in = plaintext, .out = ct, .sz = sizeof(plaintext), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_ECB, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &enc), WHAL_SUCCESS); whal_Crypto_AesEcbArgs dec = { .dir = WHAL_CRYPTO_DECRYPT, .key = key, .keySz = 32, .in = ct, .out = pt, .sz = sizeof(ct), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_ECB, &dec), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &dec), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(pt, plaintext, sizeof(plaintext)); @@ -208,21 +243,26 @@ static void Test_Crypto_AesCbc_Basic(void) uint8_t ct[32] = {0}; uint8_t pt[32] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_CBC)) - WHAL_SKIP(); - whal_Crypto_AesCbcArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = key, .keySz = 32, .iv = iv, .in = plaintext, .out = ct, .sz = sizeof(plaintext), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CBC, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &enc), WHAL_SUCCESS); whal_Crypto_AesCbcArgs dec = { .dir = WHAL_CRYPTO_DECRYPT, .key = key, .keySz = 32, .iv = iv, .in = ct, .out = pt, .sz = sizeof(ct), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CBC, &dec), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &dec), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(pt, plaintext, sizeof(plaintext)); @@ -233,21 +273,26 @@ static void Test_Crypto_AesCtr_Basic(void) uint8_t ct[32] = {0}; uint8_t pt[32] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_CTR)) - WHAL_SKIP(); - whal_Crypto_AesCtrArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = key, .keySz = 32, .iv = iv, .in = plaintext, .out = ct, .sz = sizeof(plaintext), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CTR, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &enc), WHAL_SUCCESS); whal_Crypto_AesCtrArgs dec = { .dir = WHAL_CRYPTO_DECRYPT, .key = key, .keySz = 32, .iv = iv, .in = ct, .out = pt, .sz = sizeof(ct), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CTR, &dec), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &dec), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(pt, plaintext, sizeof(plaintext)); @@ -260,9 +305,6 @@ static void Test_Crypto_AesGcm_Basic(void) uint8_t encTag[16] = {0}; uint8_t decTag[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_GCM)) - WHAL_SKIP(); - whal_Crypto_AesGcmArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = key, .keySz = 32, .iv = nonce, .ivSz = sizeof(nonce), @@ -270,7 +312,11 @@ static void Test_Crypto_AesGcm_Basic(void) .aad = aad, .aadSz = sizeof(aad), .tag = encTag, .tagSz = sizeof(encTag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_GCM, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), WHAL_SUCCESS); whal_Crypto_AesGcmArgs dec = { @@ -280,7 +326,11 @@ static void Test_Crypto_AesGcm_Basic(void) .aad = aad, .aadSz = sizeof(aad), .tag = decTag, .tagSz = sizeof(decTag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_GCM, &dec), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &dec), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(pt, plaintext, sizeof(plaintext)); @@ -292,16 +342,17 @@ static void Test_Crypto_AesGmac_Basic(void) uint8_t tag1[16] = {0}; uint8_t tag2[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_GMAC)) - WHAL_SKIP(); - whal_Crypto_AesGmacArgs args1 = { .key = key, .keySz = 32, .iv = nonce, .ivSz = sizeof(nonce), .aad = aad, .aadSz = sizeof(aad), .tag = tag1, .tagSz = sizeof(tag1), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_GMAC, &args1), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args1), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args1), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args1), WHAL_SUCCESS); whal_Crypto_AesGmacArgs args2 = { @@ -310,7 +361,11 @@ static void Test_Crypto_AesGmac_Basic(void) .aad = aad, .aadSz = sizeof(aad), .tag = tag2, .tagSz = sizeof(tag2), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_GMAC, &args2), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args2), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args2), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args2), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(tag1, tag2, sizeof(tag1)); @@ -323,9 +378,6 @@ static void Test_Crypto_AesCcm_Basic(void) uint8_t encTag[16] = {0}; uint8_t decTag[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_CCM)) - WHAL_SKIP(); - whal_Crypto_AesCcmArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = key, .keySz = 32, .nonce = nonce, .nonceSz = sizeof(nonce), @@ -333,7 +385,11 @@ static void Test_Crypto_AesCcm_Basic(void) .aad = aad, .aadSz = sizeof(aad), .tag = encTag, .tagSz = sizeof(encTag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CCM, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &enc), WHAL_SUCCESS); whal_Crypto_AesCcmArgs dec = { @@ -343,7 +399,11 @@ static void Test_Crypto_AesCcm_Basic(void) .aad = aad, .aadSz = sizeof(aad), .tag = decTag, .tagSz = sizeof(decTag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CCM, &dec), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &dec), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &dec), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(pt, plaintext, sizeof(plaintext)); @@ -354,14 +414,15 @@ static void Test_Crypto_AesEcb_KnownAnswer(void) { uint8_t ct[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_ECB)) - WHAL_SKIP(); - whal_Crypto_AesEcbArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = nistKey, .keySz = 32, .in = nistPt, .out = ct, .sz = sizeof(nistPt), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_ECB, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_ECB, &enc), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(ct, nistEcbCt, sizeof(nistEcbCt)); @@ -371,14 +432,15 @@ static void Test_Crypto_AesCbc_KnownAnswer(void) { uint8_t ct[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_CBC)) - WHAL_SKIP(); - whal_Crypto_AesCbcArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = nistKey, .keySz = 32, .iv = nistCbcIv, .in = nistPt, .out = ct, .sz = sizeof(nistPt), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CBC, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CBC, &enc), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(ct, nistCbcCt, sizeof(nistCbcCt)); @@ -388,14 +450,15 @@ static void Test_Crypto_AesCtr_KnownAnswer(void) { uint8_t ct[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_CTR)) - WHAL_SKIP(); - whal_Crypto_AesCtrArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = nistKey, .keySz = 32, .iv = nistCtrIv, .in = nistPt, .out = ct, .sz = sizeof(nistPt), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CTR, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CTR, &enc), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(ct, nistCtrCt, sizeof(nistCtrCt)); @@ -406,9 +469,6 @@ static void Test_Crypto_AesGcm_KnownAnswer(void) uint8_t ct[64] = {0}; uint8_t tag[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_GCM)) - WHAL_SKIP(); - whal_Crypto_AesGcmArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = gcmKey, .keySz = 32, .iv = gcmIv, .ivSz = sizeof(gcmIv), @@ -416,19 +476,43 @@ static void Test_Crypto_AesGcm_KnownAnswer(void) .aad = NULL, .aadSz = 0, .tag = tag, .tagSz = sizeof(tag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_GCM, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(ct, gcmCt, sizeof(gcmCt)); WHAL_ASSERT_MEM_EQ(tag, gcmTag, sizeof(gcmTag)); } -static void Test_Crypto_AesGmac_KnownAnswer(void) +static void Test_Crypto_AesGcm_KnownAnswer_PartialBlocks(void) { + uint8_t ct[sizeof(gcm16Pt)] = {0}; uint8_t tag[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_GMAC)) - WHAL_SKIP(); + whal_Crypto_AesGcmArgs enc = { + .dir = WHAL_CRYPTO_ENCRYPT, .key = gcmKey, .keySz = 32, + .iv = gcmIv, .ivSz = sizeof(gcmIv), + .in = gcm16Pt, .out = ct, .sz = sizeof(gcm16Pt), + .aad = gcm16Aad, .aadSz = sizeof(gcm16Aad), + .tag = tag, .tagSz = sizeof(tag), + }; + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GCM, &enc), + WHAL_SUCCESS); + + WHAL_ASSERT_MEM_EQ(ct, gcm16Ct, sizeof(gcm16Ct)); + WHAL_ASSERT_MEM_EQ(tag, gcm16Tag, sizeof(gcm16Tag)); +} + +static void Test_Crypto_AesGmac_KnownAnswer(void) +{ + uint8_t tag[16] = {0}; whal_Crypto_AesGmacArgs args = { .key = gmacKey, .keySz = 32, @@ -436,7 +520,11 @@ static void Test_Crypto_AesGmac_KnownAnswer(void) .aad = gmacAad, .aadSz = sizeof(gmacAad), .tag = tag, .tagSz = sizeof(tag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_GMAC, &args), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_GMAC, &args), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(tag, gmacTag, sizeof(gmacTag)); @@ -447,9 +535,6 @@ static void Test_Crypto_AesCcm_KnownAnswer(void) uint8_t ct[24] = {0}; uint8_t tag[16] = {0}; - if (!BoardHasOp(BOARD_CRYPTO_AES_CCM)) - WHAL_SKIP(); - whal_Crypto_AesCcmArgs enc = { .dir = WHAL_CRYPTO_ENCRYPT, .key = ccmKey, .keySz = 32, .nonce = ccmNonce, .nonceSz = sizeof(ccmNonce), @@ -457,7 +542,11 @@ static void Test_Crypto_AesCcm_KnownAnswer(void) .aad = ccmAad, .aadSz = sizeof(ccmAad), .tag = tag, .tagSz = sizeof(tag), }; - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, BOARD_CRYPTO_AES_CCM, &enc), + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &enc), + WHAL_SUCCESS); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, WHAL_CRYPTO_AES_CCM, &enc), WHAL_SUCCESS); WHAL_ASSERT_MEM_EQ(ct, ccmCt, sizeof(ccmCt)); @@ -470,13 +559,17 @@ static void Test_Crypto_Api(void) WHAL_ASSERT_EQ(whal_Crypto_Init(NULL), WHAL_EINVAL); WHAL_ASSERT_EQ(whal_Crypto_Deinit(NULL), WHAL_EINVAL); - WHAL_ASSERT_EQ(whal_Crypto_Op(NULL, 0, &args), WHAL_EINVAL); - WHAL_ASSERT_EQ(whal_Crypto_Op(&g_whalCrypto, 0, NULL), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Crypto_StartOp(NULL, 0, &args), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Crypto_Process(NULL, 0, &args), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(NULL, 0, &args), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Crypto_StartOp(&g_whalCrypto, 0, NULL), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Crypto_Process(&g_whalCrypto, 0, NULL), WHAL_EINVAL); + WHAL_ASSERT_EQ(whal_Crypto_EndOp(&g_whalCrypto, 0, NULL), WHAL_EINVAL); } void whal_Test_Crypto(void) { - WHAL_TEST_SUITE_START("crypto"); + WHAL_TEST_SUITE_START("cipher"); WHAL_TEST(Test_Crypto_Api); WHAL_TEST(Test_Crypto_AesEcb_Basic); WHAL_TEST(Test_Crypto_AesEcb_KnownAnswer); @@ -486,6 +579,7 @@ void whal_Test_Crypto(void) WHAL_TEST(Test_Crypto_AesCtr_KnownAnswer); WHAL_TEST(Test_Crypto_AesGcm_Basic); WHAL_TEST(Test_Crypto_AesGcm_KnownAnswer); + WHAL_TEST(Test_Crypto_AesGcm_KnownAnswer_PartialBlocks); WHAL_TEST(Test_Crypto_AesGmac_Basic); WHAL_TEST(Test_Crypto_AesGmac_KnownAnswer); WHAL_TEST(Test_Crypto_AesCcm_Basic); diff --git a/wolfHAL/block/block.h b/wolfHAL/block/block.h index 7df170f..5ab2154 100644 --- a/wolfHAL/block/block.h +++ b/wolfHAL/block/block.h @@ -49,7 +49,7 @@ struct whal_Block { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Block_Init(blockDev) ((blockDev)->driver->Init((blockDev))) @@ -65,7 +65,7 @@ struct whal_Block { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Block_Init(whal_Block *blockDev); /* @@ -75,7 +75,7 @@ whal_Error whal_Block_Init(whal_Block *blockDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Block_Deinit(whal_Block *blockDev); /* @@ -88,7 +88,7 @@ whal_Error whal_Block_Deinit(whal_Block *blockDev); * * @retval WHAL_SUCCESS Read completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Block_Read(whal_Block *blockDev, uint32_t block, void *data, uint32_t blockCount); @@ -102,7 +102,7 @@ whal_Error whal_Block_Read(whal_Block *blockDev, uint32_t block, void *data, * * @retval WHAL_SUCCESS Write accepted or completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Block_Write(whal_Block *blockDev, uint32_t block, const void *data, uint32_t blockCount); @@ -115,7 +115,7 @@ whal_Error whal_Block_Write(whal_Block *blockDev, uint32_t block, * * @retval WHAL_SUCCESS Erase accepted or completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Block_Erase(whal_Block *blockDev, uint32_t block, uint32_t blockCount); diff --git a/wolfHAL/clock/clock.h b/wolfHAL/clock/clock.h index 64fb957..f2237be 100644 --- a/wolfHAL/clock/clock.h +++ b/wolfHAL/clock/clock.h @@ -42,7 +42,7 @@ struct whal_Clock { * * @retval WHAL_SUCCESS Driver-specific init routine ran successfully. * @retval WHAL_EINVAL Null pointer or driver rejected the configuration. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Clock_Init(clkDev) ((clkDev)->driver->Init((clkDev))) @@ -57,7 +57,7 @@ struct whal_Clock { * * @retval WHAL_SUCCESS Driver-specific init routine ran successfully. * @retval WHAL_EINVAL Null pointer or driver rejected the configuration. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Clock_Init(whal_Clock *clkDev); /* @@ -67,7 +67,7 @@ whal_Error whal_Clock_Init(whal_Clock *clkDev); * * @retval WHAL_SUCCESS Driver-specific deinit routine ran successfully. * @retval WHAL_EINVAL Null pointer or driver refused to deinitialize. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Clock_Deinit(whal_Clock *clkDev); /* @@ -77,7 +77,7 @@ whal_Error whal_Clock_Deinit(whal_Clock *clkDev); * * @retval WHAL_SUCCESS Clock was enabled (or already running). * @retval WHAL_EINVAL Null pointer or driver-specific enable failed. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Clock_Enable(whal_Clock *clkDev, const void *clk); /* @@ -87,7 +87,7 @@ whal_Error whal_Clock_Enable(whal_Clock *clkDev, const void *clk); * * @retval WHAL_SUCCESS Clock was disabled (or already stopped). * @retval WHAL_EINVAL Null pointer or driver-specific disable failed. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Clock_Disable(whal_Clock *clkDev, const void *clk); #endif diff --git a/wolfHAL/crypto/crypto.h b/wolfHAL/crypto/crypto.h index d20b4a9..e3604a9 100644 --- a/wolfHAL/crypto/crypto.h +++ b/wolfHAL/crypto/crypto.h @@ -18,6 +18,15 @@ typedef enum { WHAL_CRYPTO_DECRYPT, } whal_Crypto_Dir; +enum { + WHAL_CRYPTO_AES_ECB, + WHAL_CRYPTO_AES_CBC, + WHAL_CRYPTO_AES_CTR, + WHAL_CRYPTO_AES_GCM, + WHAL_CRYPTO_AES_GMAC, + WHAL_CRYPTO_AES_CCM, +}; + /* ---- Per-algorithm argument structs ---- */ /* @@ -112,11 +121,6 @@ typedef struct { typedef struct whal_Crypto whal_Crypto; -/* - * @brief Operation function pointer type for per-device ops tables. - */ -typedef whal_Error (*whal_Crypto_OpFunc)(whal_Crypto *cryptoDev, void *opArgs); - /* * @brief Driver vtable for crypto devices. */ @@ -125,55 +129,114 @@ typedef struct { whal_Error (*Init)(whal_Crypto *cryptoDev); /* Deinitialize the crypto hardware. */ whal_Error (*Deinit)(whal_Crypto *cryptoDev); + /* Start a crypto operation: configure hardware, load key/IV, process AAD. */ + whal_Error (*StartOp)(whal_Crypto *cryptoDev, size_t opId, void *opArgs); + /* Process data through the crypto engine. */ + whal_Error (*Process)(whal_Crypto *cryptoDev, size_t opId, void *opArgs); + /* End a crypto operation: finalize, release hardware. */ + whal_Error (*EndOp)(whal_Crypto *cryptoDev, size_t opId, void *opArgs); } whal_CryptoDriver; /* - * @brief Crypto device instance tying a register map, driver, and ops table. + * @brief Crypto device instance tying a register map, driver, and configuration. */ struct whal_Crypto { const whal_Regmap regmap; const whal_CryptoDriver *driver; - const whal_Crypto_OpFunc *ops; - size_t opsCount; const void *cfg; }; +/* + * @brief Initialize a crypto device and its driver. + * + * @param cryptoDev Pointer to the crypto instance to initialize. + * + * @retval WHAL_SUCCESS Driver-specific init completed. + * @retval WHAL_EINVAL Null pointer. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. + */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Crypto_Init(cryptoDev) ((cryptoDev)->driver->Init((cryptoDev))) #define whal_Crypto_Deinit(cryptoDev) ((cryptoDev)->driver->Deinit((cryptoDev))) -#define whal_Crypto_Op(cryptoDev, op, opArgs) ((cryptoDev)->ops[(op)]((cryptoDev), (opArgs))) +#define whal_Crypto_StartOp(cryptoDev, opId, opArgs) ((cryptoDev)->driver->StartOp((cryptoDev), (opId), (opArgs))) +#define whal_Crypto_Process(cryptoDev, opId, opArgs) ((cryptoDev)->driver->Process((cryptoDev), (opId), (opArgs))) +#define whal_Crypto_EndOp(cryptoDev, opId, opArgs) ((cryptoDev)->driver->EndOp((cryptoDev), (opId), (opArgs))) #else /* - * @brief Initializes a crypto device and its driver. + * @brief Initialize a crypto device and its driver. * * @param cryptoDev Pointer to the crypto instance to initialize. * - * @retval WHAL_SUCCESS Driver-specific init completed. - * @retval WHAL_EINVAL Null pointer or driver rejected configuration. + * @retval WHAL_SUCCESS Driver-specific init completed. + * @retval WHAL_EINVAL Null pointer. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Crypto_Init(whal_Crypto *cryptoDev); /* - * @brief Deinitializes a crypto device and releases resources. + * @brief Deinitialize a crypto device and release resources. * * @param cryptoDev Pointer to the crypto instance to deinitialize. * - * @retval WHAL_SUCCESS Driver-specific deinit completed. - * @retval WHAL_EINVAL Null pointer or driver refused to deinit. + * @retval WHAL_SUCCESS Driver-specific deinit completed. + * @retval WHAL_EINVAL Null pointer. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Crypto_Deinit(whal_Crypto *cryptoDev); /* - * @brief Perform a crypto operation. + * @brief Start a crypto operation. + * + * Configures the hardware for the requested algorithm, loads keys and + * parameters, and performs any setup (e.g. AAD processing for AEAD modes). + * + * @param cryptoDev Pointer to the crypto instance. + * @param opId Operation identifier (e.g. WHAL_CRYPTO_AES_GCM). + * @param opArgs Pointer to the algorithm-specific arguments struct. + * + * @retval WHAL_SUCCESS Operation started. + * @retval WHAL_EINVAL Invalid arguments. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. + * @retval WHAL_EHARDWARE Hardware error during setup. + */ +whal_Error whal_Crypto_StartOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs); + +/* + * @brief Process data through an active crypto operation. + * + * Feeds data through the hardware. May be called multiple times for + * streaming. Optional for single-shot operations. + * + * @param cryptoDev Pointer to the crypto instance. + * @param opId Operation identifier. + * @param opArgs Pointer to the algorithm-specific arguments struct. + * + * @retval WHAL_SUCCESS Data processed. + * @retval WHAL_EINVAL Invalid arguments. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. + * @retval WHAL_EHARDWARE Hardware error during processing. + */ +whal_Error whal_Crypto_Process(whal_Crypto *cryptoDev, size_t opId, + void *opArgs); + +/* + * @brief End a crypto operation. + * + * Finalizes the operation, reads output (tag, digest, signature), and + * releases the hardware. * * @param cryptoDev Pointer to the crypto instance. - * @param op Operation index into the platform-specific ops table. - * @param opArgs Platform-specific operation arguments. + * @param opId Operation identifier. + * @param opArgs Pointer to the algorithm-specific arguments struct. * - * @retval WHAL_SUCCESS Operation completed. - * @retval WHAL_EINVAL Null pointer, invalid op, or driver failed. + * @retval WHAL_SUCCESS Operation finalized. + * @retval WHAL_EINVAL Invalid arguments. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. + * @retval WHAL_EHARDWARE Hardware error during finalization. */ -whal_Error whal_Crypto_Op(whal_Crypto *cryptoDev, size_t op, void *opArgs); +whal_Error whal_Crypto_EndOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs); #endif #endif /* WHAL_CRYPTO_H */ diff --git a/wolfHAL/crypto/stm32wb_aes.h b/wolfHAL/crypto/stm32wb_aes.h index c781e29..73fb487 100644 --- a/wolfHAL/crypto/stm32wb_aes.h +++ b/wolfHAL/crypto/stm32wb_aes.h @@ -11,7 +11,7 @@ * * The STM32WB AES1 peripheral supports 128/256-bit keys in ECB, CBC, * CTR, GCM, GMAC, and CCM modes. This driver exposes those modes through the - * generic whal_Crypto Op interface. + * generic whal_Crypto interface using the StartOp/Process/EndOp pattern. */ /* @@ -30,7 +30,7 @@ extern const whal_CryptoDriver whal_Stm32wbAes_Driver; /* * @brief Initialize the STM32WB AES peripheral. * - * @param cryptoDev Crypto device instance. + * @param cryptoDev Cipher device instance. * * @retval WHAL_SUCCESS Initialization completed. * @retval WHAL_EINVAL Invalid arguments. @@ -40,97 +40,57 @@ whal_Error whal_Stm32wbAes_Init(whal_Crypto *cryptoDev); /* * @brief Deinitialize the STM32WB AES peripheral. * - * @param cryptoDev Crypto device instance. + * @param cryptoDev Cipher device instance. * * @retval WHAL_SUCCESS Deinit completed. * @retval WHAL_EINVAL Invalid arguments. */ whal_Error whal_Stm32wbAes_Deinit(whal_Crypto *cryptoDev); -#endif /* !WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES */ - - -/* - * @brief Perform AES-ECB encrypt or decrypt. - * - * Compatible with whal_Crypto_OpFunc. Cast opArgs to whal_Crypto_AesEcbArgs. - * - * @param cryptoDev Crypto device instance. - * @param opArgs Pointer to whal_Crypto_AesEcbArgs. - * - * @retval WHAL_SUCCESS Operation completed. - * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_EHARDWARE Hardware error during operation. - */ -whal_Error whal_Stm32wbAes_AesEcb(whal_Crypto *cryptoDev, void *opArgs); /* - * @brief Perform AES-CBC encrypt or decrypt. + * @brief Start an AES cipher operation. * - * Compatible with whal_Crypto_OpFunc. Cast opArgs to whal_Crypto_AesCbcArgs. + * @param cryptoDev Cipher device instance. + * @param opId Cipher algorithm identifier. + * @param opArgs Pointer to the algorithm-specific arguments struct. * - * @param cryptoDev Crypto device instance. - * @param opArgs Pointer to whal_Crypto_AesCbcArgs. - * - * @retval WHAL_SUCCESS Operation completed. + * @retval WHAL_SUCCESS Operation started. * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_EHARDWARE Hardware error during operation. + * @retval WHAL_ENOTSUP Unsupported opId or parameter (e.g. key size). + * @retval WHAL_EHARDWARE Hardware error during setup. */ -whal_Error whal_Stm32wbAes_AesCbc(whal_Crypto *cryptoDev, void *opArgs); +whal_Error whal_Stm32wbAes_StartOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs); /* - * @brief Perform AES-CTR encrypt or decrypt. - * - * Compatible with whal_Crypto_OpFunc. Cast opArgs to whal_Crypto_AesCtrArgs. + * @brief Process data through an active AES operation. * - * @param cryptoDev Crypto device instance. - * @param opArgs Pointer to whal_Crypto_AesCtrArgs. + * @param cryptoDev Cipher device instance. + * @param opId Cipher algorithm identifier. + * @param opArgs Pointer to the algorithm-specific arguments struct. * - * @retval WHAL_SUCCESS Operation completed. + * @retval WHAL_SUCCESS Data processed. * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_EHARDWARE Hardware error during operation. + * @retval WHAL_ENOTSUP Unsupported opId. + * @retval WHAL_EHARDWARE Hardware error during processing. */ -whal_Error whal_Stm32wbAes_AesCtr(whal_Crypto *cryptoDev, void *opArgs); +whal_Error whal_Stm32wbAes_Process(whal_Crypto *cryptoDev, size_t opId, + void *opArgs); /* - * @brief Perform AES-GCM encrypt or decrypt. + * @brief End an AES cipher operation. * - * Compatible with whal_Crypto_OpFunc. Cast opArgs to whal_Crypto_AesGcmArgs. + * @param cryptoDev Cipher device instance. + * @param opId Cipher algorithm identifier. + * @param opArgs Pointer to the algorithm-specific arguments struct. * - * @param cryptoDev Crypto device instance. - * @param opArgs Pointer to whal_Crypto_AesGcmArgs. - * - * @retval WHAL_SUCCESS Operation completed. + * @retval WHAL_SUCCESS Operation finalized. * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_EHARDWARE Hardware error during operation. + * @retval WHAL_ENOTSUP Unsupported opId. + * @retval WHAL_EHARDWARE Hardware error during finalization. */ -whal_Error whal_Stm32wbAes_AesGcm(whal_Crypto *cryptoDev, void *opArgs); - -/* - * @brief Perform AES-GMAC authentication (no payload). - * - * Compatible with whal_Crypto_OpFunc. Cast opArgs to whal_Crypto_AesGmacArgs. - * - * @param cryptoDev Crypto device instance. - * @param opArgs Pointer to whal_Crypto_AesGmacArgs. - * - * @retval WHAL_SUCCESS Operation completed. - * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_EHARDWARE Hardware error during operation. - */ -whal_Error whal_Stm32wbAes_AesGmac(whal_Crypto *cryptoDev, void *opArgs); - -/* - * @brief Perform AES-CCM encrypt or decrypt. - * - * Compatible with whal_Crypto_OpFunc. Cast opArgs to whal_Crypto_AesCcmArgs. - * - * @param cryptoDev Crypto device instance. - * @param opArgs Pointer to whal_Crypto_AesCcmArgs. - * - * @retval WHAL_SUCCESS Operation completed. - * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_EHARDWARE Hardware error during operation. - */ -whal_Error whal_Stm32wbAes_AesCcm(whal_Crypto *cryptoDev, void *opArgs); +whal_Error whal_Stm32wbAes_EndOp(whal_Crypto *cryptoDev, size_t opId, + void *opArgs); +#endif /* !WHAL_CFG_CRYPTO_API_MAPPING_STM32WB_AES */ #endif /* WHAL_STM32WB_AES_H */ diff --git a/wolfHAL/error.h b/wolfHAL/error.h index 388a069..ed3bc46 100644 --- a/wolfHAL/error.h +++ b/wolfHAL/error.h @@ -21,8 +21,12 @@ enum { WHAL_EHARDWARE = -4002, /* Operation timed out. */ WHAL_ETIMEOUT = -4003, - /* Operation not implemented by the selected driver. */ - WHAL_ENOTIMPL = -4004, + /* Operation or argument not supported by the selected driver/hardware + * (use for requests that are valid in general but this implementation + * cannot fulfill — e.g., hardware lacks the feature or the specific + * parameter combination isn't supported). For universally invalid + * arguments (null pointer, out-of-range enum) return WHAL_EINVAL. */ + WHAL_ENOTSUP = -4004, }; #endif /* WHAL_ERROR_H */ diff --git a/wolfHAL/flash/flash.h b/wolfHAL/flash/flash.h index 9101540..6e9e80e 100644 --- a/wolfHAL/flash/flash.h +++ b/wolfHAL/flash/flash.h @@ -49,7 +49,7 @@ struct whal_Flash { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Flash_Init(flashDev) ((flashDev)->driver->Init((flashDev))) @@ -67,7 +67,7 @@ struct whal_Flash { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Init(whal_Flash *flashDev); /* @@ -77,7 +77,7 @@ whal_Error whal_Flash_Init(whal_Flash *flashDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Deinit(whal_Flash *flashDev); /* @@ -89,7 +89,7 @@ whal_Error whal_Flash_Deinit(whal_Flash *flashDev); * * @retval WHAL_SUCCESS Lock applied. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Lock(whal_Flash *flashDev, size_t addr, size_t len); /* @@ -101,7 +101,7 @@ whal_Error whal_Flash_Lock(whal_Flash *flashDev, size_t addr, size_t len); * * @retval WHAL_SUCCESS Unlock applied. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Unlock(whal_Flash *flashDev, size_t addr, size_t len); /* @@ -114,7 +114,7 @@ whal_Error whal_Flash_Unlock(whal_Flash *flashDev, size_t addr, size_t len); * * @retval WHAL_SUCCESS Read completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Read(whal_Flash *flashDev, size_t addr, void *data, size_t dataSz); /* @@ -127,7 +127,7 @@ whal_Error whal_Flash_Read(whal_Flash *flashDev, size_t addr, void *data, size_t * * @retval WHAL_SUCCESS Write accepted or completed. * @retval WHAL_EINVAL Null pointer or bad arguments. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Write(whal_Flash *flashDev, size_t addr, const void *data, size_t dataSz); /* @@ -139,7 +139,7 @@ whal_Error whal_Flash_Write(whal_Flash *flashDev, size_t addr, const void *data, * * @retval WHAL_SUCCESS Erase accepted or completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Flash_Erase(whal_Flash *flashDev, size_t addr, size_t dataSz); #endif diff --git a/wolfHAL/gpio/gpio.h b/wolfHAL/gpio/gpio.h index 2b65c7f..8d22eb1 100644 --- a/wolfHAL/gpio/gpio.h +++ b/wolfHAL/gpio/gpio.h @@ -42,7 +42,7 @@ struct whal_Gpio { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Gpio_Init(gpioDev) ((gpioDev)->driver->Init((gpioDev))) @@ -57,7 +57,7 @@ struct whal_Gpio { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Gpio_Init(whal_Gpio *gpioDev); /* @@ -67,7 +67,7 @@ whal_Error whal_Gpio_Init(whal_Gpio *gpioDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Gpio_Deinit(whal_Gpio *gpioDev); /* @@ -79,7 +79,7 @@ whal_Error whal_Gpio_Deinit(whal_Gpio *gpioDev); * * @retval WHAL_SUCCESS Pin value stored in @p value. * @retval WHAL_EINVAL Null pointer or bad pin. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Gpio_Get(whal_Gpio *gpioDev, size_t pin, size_t *value); /* @@ -91,7 +91,7 @@ whal_Error whal_Gpio_Get(whal_Gpio *gpioDev, size_t pin, size_t *value); * * @retval WHAL_SUCCESS Pin updated. * @retval WHAL_EINVAL Null pointer or bad pin. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Gpio_Set(whal_Gpio *gpioDev, size_t pin, size_t value); #endif diff --git a/wolfHAL/rng/rng.h b/wolfHAL/rng/rng.h index 9227f55..b111ada 100644 --- a/wolfHAL/rng/rng.h +++ b/wolfHAL/rng/rng.h @@ -41,7 +41,7 @@ struct whal_Rng { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Rng_Init(rngDev) ((rngDev)->driver->Init((rngDev))) @@ -56,7 +56,7 @@ struct whal_Rng { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Rng_Init(whal_Rng *rngDev); /* @@ -66,7 +66,7 @@ whal_Error whal_Rng_Init(whal_Rng *rngDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Rng_Deinit(whal_Rng *rngDev); /* @@ -78,7 +78,7 @@ whal_Error whal_Rng_Deinit(whal_Rng *rngDev); * * @retval WHAL_SUCCESS Buffer filled with random data. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Rng_Generate(whal_Rng *rngDev, void *rngData, size_t rngDataSz); #endif diff --git a/wolfHAL/spi/spi.h b/wolfHAL/spi/spi.h index 931fcdb..a94427c 100644 --- a/wolfHAL/spi/spi.h +++ b/wolfHAL/spi/spi.h @@ -65,7 +65,7 @@ struct whal_Spi { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Spi_Init(spiDev) ((spiDev)->driver->Init((spiDev))) @@ -83,7 +83,7 @@ struct whal_Spi { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Spi_Init(whal_Spi *spiDev); /* @@ -93,7 +93,7 @@ whal_Error whal_Spi_Init(whal_Spi *spiDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Spi_Deinit(whal_Spi *spiDev); /* @@ -107,7 +107,7 @@ whal_Error whal_Spi_Deinit(whal_Spi *spiDev); * * @retval WHAL_SUCCESS Communication session started. * @retval WHAL_EINVAL Null pointer or invalid parameters. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Spi_StartCom(whal_Spi *spiDev, whal_Spi_ComCfg *comCfg); /* @@ -120,7 +120,7 @@ whal_Error whal_Spi_StartCom(whal_Spi *spiDev, whal_Spi_ComCfg *comCfg); * * @retval WHAL_SUCCESS Communication session ended. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Spi_EndCom(whal_Spi *spiDev); /* @@ -139,7 +139,7 @@ whal_Error whal_Spi_EndCom(whal_Spi *spiDev); * * @retval WHAL_SUCCESS Transfer completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Spi_SendRecv(whal_Spi *spiDev, const void *tx, size_t txLen, void *rx, size_t rxLen); #endif diff --git a/wolfHAL/timer/timer.h b/wolfHAL/timer/timer.h index cbdc43c..c7bfd7e 100644 --- a/wolfHAL/timer/timer.h +++ b/wolfHAL/timer/timer.h @@ -44,7 +44,7 @@ struct whal_Timer{ * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ #ifdef WHAL_CFG_DIRECT_CALLBACKS #define whal_Timer_Init(timerDev) ((timerDev)->driver->Init((timerDev))) @@ -60,7 +60,7 @@ struct whal_Timer{ * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Timer_Init(whal_Timer *timerDev); /* @@ -70,7 +70,7 @@ whal_Error whal_Timer_Init(whal_Timer *timerDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Timer_Deinit(whal_Timer *timerDev); /* @@ -80,7 +80,7 @@ whal_Error whal_Timer_Deinit(whal_Timer *timerDev); * * @retval WHAL_SUCCESS Timer started. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Timer_Start(whal_Timer *timerDev); /* @@ -90,7 +90,7 @@ whal_Error whal_Timer_Start(whal_Timer *timerDev); * * @retval WHAL_SUCCESS Timer stopped. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Timer_Stop(whal_Timer *timerDev); /* @@ -100,7 +100,7 @@ whal_Error whal_Timer_Stop(whal_Timer *timerDev); * * @retval WHAL_SUCCESS Timer reset. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Timer_Reset(whal_Timer *timerDev); #endif diff --git a/wolfHAL/uart/uart.h b/wolfHAL/uart/uart.h index 65bb4a9..1dddad3 100644 --- a/wolfHAL/uart/uart.h +++ b/wolfHAL/uart/uart.h @@ -55,7 +55,7 @@ struct whal_Uart { * * @retval WHAL_SUCCESS Driver-specific init completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Uart_Init(whal_Uart *uartDev); @@ -66,7 +66,7 @@ whal_Error whal_Uart_Init(whal_Uart *uartDev); * * @retval WHAL_SUCCESS Driver-specific deinit completed. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Uart_Deinit(whal_Uart *uartDev); @@ -79,7 +79,7 @@ whal_Error whal_Uart_Deinit(whal_Uart *uartDev); * * @retval WHAL_SUCCESS Buffer was queued or transmitted. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Uart_Send(whal_Uart *uartDev, const void *data, size_t dataSz); @@ -92,7 +92,7 @@ whal_Error whal_Uart_Send(whal_Uart *uartDev, const void *data, size_t dataSz); * * @retval WHAL_SUCCESS Buffer was filled or receive started. * @retval WHAL_EINVAL Null pointer. - * @retval WHAL_ENOTIMPL Operation not implemented by this driver. + * @retval WHAL_ENOTSUP Operation not implemented by this driver. */ whal_Error whal_Uart_Recv(whal_Uart *uartDev, void *data, size_t dataSz); @@ -109,7 +109,7 @@ whal_Error whal_Uart_Recv(whal_Uart *uartDev, void *data, size_t dataSz); * * @retval WHAL_SUCCESS Transfer started. * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_ENOTIMPL Async not supported by this driver. + * @retval WHAL_ENOTSUP Async not supported by this driver. */ whal_Error whal_Uart_SendAsync(whal_Uart *uartDev, const void *data, size_t dataSz); @@ -126,7 +126,7 @@ whal_Error whal_Uart_SendAsync(whal_Uart *uartDev, const void *data, size_t data * * @retval WHAL_SUCCESS Receive started. * @retval WHAL_EINVAL Invalid arguments. - * @retval WHAL_ENOTIMPL Async not supported by this driver. + * @retval WHAL_ENOTSUP Async not supported by this driver. */ whal_Error whal_Uart_RecvAsync(whal_Uart *uartDev, void *data, size_t dataSz); #endif