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Pico 2 W (RP2350 + CYW43439): bare-metal wolfIP port
New port under src/port/rp2350_cyw43439/ for the Raspberry Pi Pico 2 W, building for both RP2350 cores (Cortex-M33 and Hazard3 RISC-V). Hardware-proven on a real Pico 2 W: RP2350 boot (vectors at image base, XOSC/clock init, UART0 console), clean-room CYW43439 gSPI transport over a PIO state machine, 32-bit bus mode, backplane + ALP clock, firmware blob download (ARM RUNNING), the SDPCM/CDC ioctl path (WLC_UP + STA MAC read), and the WPA2 join: cyw43_connect (sup_wpa=0, event_msgs, WSEC/WPA_AUTH, RSN IE, WLC_SET_SSID) associates to a live AP and cyw43_poll decodes the WLC_E_LINK events to report assoc up/down via SPI_STATUS (replacing the invalid PIO-owned GP24 read). Not yet exercised on silicon (run once the 4-way drives them): the BDC EAPOL/802.3 data path and WLC_SET_KEY. The wolfIP_wifi_ops vtable plus a host-supplicant 4-way driver gated behind WOLFIP_WITH_SUPPLICANT wire it to the in-tree supplicant. The ~225 KB Infineon firmware blob is NOT committed: weak accessors return NULL when it is absent (the build links and stops cleanly after the backplane stage), and a present fw_local/cyw43_fw_blob.c is compiled in. Bring-up logging is gated behind DEBUG_BRINGUP (default on).
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‎src/port/rp2350_cyw43439/.gitignore‎

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# CYW43439 firmware blob - third-party license (Broadcom/Infineon +
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# George Robotics/Raspberry Pi, RP-silicon only). NOT distributed with
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# wolfIP. Obtain from the pico-sdk cyw43-driver firmware/ directory and
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# place the vendor headers + cyw43_fw_blob.c here for local builds.
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fw_local/
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# Build artifacts
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*.o
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*.elf
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*.bin
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*.uf2

‎src/port/rp2350_cyw43439/Makefile‎

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# Pi Pico 2 W (RP2350 + CYW43439) port Makefile
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#
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# Build: make CORE=m33 (default - Cortex-M33)
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# make CORE=hazard3 (Hazard3 RISC-V variant)
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#
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# Optional:
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# WIFI_SSID, WIFI_PSK : compile-time Wi-Fi credentials
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# (override config.h defaults)
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#
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# Output: app.elf + app.uf2 (UF2 via picotool, if available on PATH).
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# picotool load app.uf2 flashes via BOOTSEL.
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CORE ?= m33
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# The CORE switch forces the toolchain unconditionally. To use a
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# different cross compiler (e.g. a vendored toolchain), pass it on the
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# command line: `make CORE=m33 CC=/opt/arm/bin/arm-none-eabi-gcc`.
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ifeq ($(CORE),m33)
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CROSS_PREFIX ?= arm-none-eabi-
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ARCH_CFLAGS := -mcpu=cortex-m33+nodsp -mthumb -mfloat-abi=soft
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ARCH_LDFLAGS := -T target_m33.ld
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STARTUP_SRC := startup_m33.c
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else ifeq ($(CORE),hazard3)
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# The Debian/Ubuntu cross toolchain ships as riscv64-unknown-elf-* and
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# selects rv32 via -march/-mabi. Override CROSS_PREFIX if you have a
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# native riscv32-unknown-elf-* build (e.g. from SiFive or upstream).
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CROSS_PREFIX ?= riscv64-unknown-elf-
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ARCH_CFLAGS := -march=rv32imac -mabi=ilp32
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ARCH_LDFLAGS := -T target_hazard3.ld
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STARTUP_SRC := startup_hazard3.c
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else
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$(error CORE must be m33 or hazard3 (got '$(CORE)'))
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endif
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CC := $(CROSS_PREFIX)gcc
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OBJCOPY := $(CROSS_PREFIX)objcopy
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SIZE := $(CROSS_PREFIX)size
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ROOT := ../../..
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CFLAGS := $(ARCH_CFLAGS) -Os -ffreestanding
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CFLAGS += -fdata-sections -ffunction-sections
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CFLAGS += -g -ggdb -Wall -Wextra -Werror
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CFLAGS += -I. -I$(ROOT) -I$(ROOT)/src
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CFLAGS += $(EXTRA_CFLAGS)
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ifdef WIFI_SSID
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CFLAGS += -DWOLFIP_WIFI_SSID="\"$(WIFI_SSID)\""
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endif
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ifdef WIFI_PSK
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CFLAGS += -DWOLFIP_WIFI_PSK="\"$(WIFI_PSK)\""
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endif
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LDFLAGS := -nostdlib $(ARCH_LDFLAGS) -Wl,-gc-sections
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APP_SRCS := $(STARTUP_SRC) syscalls.c main.c rp2350_uart.c \
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rp2350_clocks.c rp2350_spi.c rp2350_pio.c \
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cyw43439_driver.c cyw43439_wifi.c
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# CYW43439 firmware blob (NOT in the repo - third-party license, RP
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# silicon only). When fw_local/cyw43_fw_blob.c is present it is compiled
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# in and the firmware download runs; otherwise the weak accessors return
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# NULL and bring-up stops cleanly after the backplane/ALP stage.
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ifneq ($(wildcard fw_local/cyw43_fw_blob.c),)
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APP_SRCS += fw_local/cyw43_fw_blob.c
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CFLAGS += -Ifw_local
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endif
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APP_OBJS := $(APP_SRCS:.c=.o)
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WOLFIP_SRC := $(ROOT)/src/wolfip.c
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WOLFIP_OBJ := wolfip.o
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ALL_OBJS := $(APP_OBJS) $(WOLFIP_OBJ)
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all: app.uf2
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@echo "Built RP2350+CYW43439 wolfIP port (CORE=$(CORE))"
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@$(SIZE) app.elf
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app.elf: $(ALL_OBJS) target_$(CORE).ld
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$(CC) $(CFLAGS) $(ALL_OBJS) $(LDFLAGS) \
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-Wl,--start-group -lc -lm -lgcc -lnosys -Wl,--end-group -o $@
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app.bin: app.elf
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$(OBJCOPY) -O binary $< $@
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# Convert ELF to UF2. Prefers picotool when available; falls back to
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# the bundled tools/elf2uf2.py (~100 lines of Python, no deps) when
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# not. Both produce the same UF2 a BOOTSEL drive will accept.
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ifeq ($(CORE),m33)
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UF2_FAMILY := arm
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else
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UF2_FAMILY := riscv
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endif
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app.uf2: app.elf
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@if command -v picotool >/dev/null 2>&1; then \
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picotool uf2 convert $< $@ ; \
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else \
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python3 tools/elf2uf2.py $< $@ --family $(UF2_FAMILY) ; \
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fi
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%.o: %.c
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$(CC) $(CFLAGS) -c $< -o $@
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$(WOLFIP_OBJ): $(WOLFIP_SRC)
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$(CC) $(CFLAGS) -Wno-unused-variable -Wno-unused-function \
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-Wno-unused-parameter -Wno-sign-compare \
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-Wno-missing-field-initializers -c $< -o $@
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flash: app.uf2
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picotool load -f app.uf2
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clean:
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rm -f *.o fw_local/*.o app.elf app.bin app.uf2 \
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selftest.elf selftest.bin selftest.uf2
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.PHONY: all clean flash

‎src/port/rp2350_cyw43439/README.md‎

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# wolfIP port: Pi Pico 2 W (RP2350 + CYW43439)
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Bare-metal wolfIP port for the [Raspberry Pi Pico 2 W](https://www.raspberrypi.com/products/raspberry-pi-pico-2/) board (RP2350 dual-arch SoC + Infineon CYW43439 Wi-Fi radio).
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## Highlights
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- **Dual-arch build**. `make CORE=m33` for Cortex-M33, `make CORE=hazard3` for Hazard3 RISC-V. Same wolfIP + supplicant source, different toolchain and entry stub.
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- **Firmware-loader-only CYW43439 driver**. Clean-room gSPI transport + SDPCM/CDC/BDC ioctl shim. No `cyw43-driver`, no WHD source reuse. The Infineon firmware blob is loaded into the radio's RAM at boot and is the only binary artifact carried over.
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- **wolfIP supplicant runs in host RAM**. All of WPA2-PSK 4-way, EAP-TLS (optional), WPA3-SAE (optional, software) is the in-tree `src/supplicant/`. The CYW43439 firmware does 802.11 mgmt (scan, auth-open, assoc) and never sees the PSK.
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## Status
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| Milestone | State |
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|-----------------------------------|-------|
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| Scaffolding (linker, startup) | done |
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| Boot + clocks + UART console | done, hardware-proven |
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| gSPI/PIO transport + 32-bit mode | done, hardware-proven |
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| Backplane + ALP + firmware load | done, hardware-proven (firmware RUNNING) |
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| SDPCM/CDC ioctl control plane | done, hardware-proven (WLC_UP + STA MAC read) |
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| Join + event-driven assoc state | done, hardware-proven (`cyw43_connect` associates to a real AP; `cyw43_poll` decodes `WLC_E_LINK` up/down) |
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| BDC EAPOL/802.3 TX-RX + `set_key` | **written, not yet validated on silicon** (needs the 4-way to drive them) |
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| `wolfIP_wifi_ops` impl | done (scan still a stub) |
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| Host supplicant 4-way integration | written behind `WOLFIP_WITH_SUPPLICANT` (needs cross-built wolfSSL) |
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| WPA2-PSK 4-way + UDP echo on real AP | pending wolfSSL-linked build |
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The control plane (boot -> firmware -> ioctl) and the **join + event path** are proven on a real Pico 2 W: the radio associates to a WPA2 AP and `cyw43_poll` reports `assoc: UP`/`down` from the decoded events. Still unexercised: the BDC EAPOL data path and `cyw43_set_key`, which only run once the 4-way handshake drives them - that needs the wolfIP supplicant linked in (`WOLFIP_WITH_SUPPLICANT`). See "Open items" below.
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Hardware validation runs against a real AP on the desk - hwsim does not validate this port (see `tools/hostapd/README.md` for the FullMAC limitation).
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## Build
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Requires:
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- `arm-none-eabi-gcc` (M33 path) and/or `riscv32-unknown-elf-gcc` (Hazard3 path)
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- `picotool` on PATH (for UF2 conversion + flash)
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- A wolfSSL install with `WOLFSSL_PUBLIC_MP` if you enable SAE
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```sh
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# Cortex-M33 build (default)
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make
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# Hazard3 RISC-V build
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make CORE=hazard3
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# Override the SSID / PSK baked into the binary
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make WIFI_SSID="my-ap" WIFI_PSK="my-passphrase"
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```
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## Flash and run
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```sh
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# Hold BOOTSEL on the Pico 2 W, plug USB, then:
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make flash
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# or copy app.uf2 to the RPI-RP2 mass-storage drive.
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# Watch the UART console (GP0/GP1, 115200 8N1):
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stty -F /dev/ttyACM0 115200 raw -echo
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cat /dev/ttyACM0
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```
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A Picoprobe (CMSIS-DAP) attached over SWD gives you live GDB:
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```sh
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openocd -f interface/cmsis-dap.cfg -c "transport select swd" \
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-f target/rp2350.cfg -c "init"
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gdb-multiarch app.elf -ex 'target remote localhost:3333'
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```
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## Pin map
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| Function | RP2350 GPIO | Notes |
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|-------------------|------------:|------------------------------------------------|
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| UART0 TX | GP0 | console out |
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| UART0 RX | GP1 | console in |
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| CYW43 WL_REG_ON | GP23 | active high; pulses radio power |
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| CYW43 SPI DATA | GP24 | shared MOSI/MISO via 470 ohm series resistor; PIO-driven; also the chip's host-IRQ line when idle |
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| CYW43 SPI CS | GP25 | active low; CPU-driven |
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| CYW43 SPI CLK | GP29 | PIO side-set clock |
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## Memory budget
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| Region | Size | Notes |
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|----------|------|---------------------------------------------------------|
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| Flash | 4 MB | XIP from QSPI. ~225 KB consumed by CYW43439 blob. |
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| SRAM | 520 KB | Generous; wolfIP + supplicant + 8 TCP + driver < 200 KB|
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| Stack | 16 KB | Reserved at top of SRAM by `target_*.ld`. |
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## Known constraints
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- The CYW43439 gSPI bus is single-data-line and shares MOSI/MISO via a 470 ohm series resistor on the Pico 2 W carrier. The clean-room driver in `cyw43439_driver.c` accounts for this (PIO transport in `rp2350_pio.c`).
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- The DATA line (GP24) is owned by the PIO state machine, so the chip's host-IRQ-when-idle signal cannot be read via SIO. `cyw43_poll()` therefore polls `SPI_STATUS` (F2-packet-available) rather than a GPIO; IRQ-driven RX is deferred (RP2350 erratum E9 also makes edge-IRQ GPIO modes risky).
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- Bring-up logging is gated by `DEBUG_BRINGUP` (default 1 in `cyw43439_driver.h`). Build with `EXTRA_CFLAGS=-DDEBUG_BRINGUP=0` to compile out the gSPI/firmware/ioctl progress prints for a production image.
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- The supplicant defaults to WPA2-PSK with `mfp_capable=1`. For WPA3-SAE targets, build with `WOLFIP_ENABLE_SAE=1 WOLFSSL_PUBLIC_MP` and set `cfg.auth_mode=WOLFIP_AUTH_SAE`.
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## Open items / not yet validated
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Validated on real silicon (a WPA2 AP on the desk): the **join** (`cyw43_connect` -> rc=0, radio associates) and the **event path** (`cyw43_poll` -> `cyw43_handle_event` decodes `WLC_E_LINK` and reports `assoc: UP`/`down`). With no host 4-way linked the link flaps UP/down as the AP times out the missing EAPOL - which also exercises the link-down decode. Note: `cyw43_rsn_ie_wpa2_psk[]` MUST match the supplicant's `own_rsn_ie` (WPA2-PSK/CCMP, MFP off); if MFP is enabled the IE has to be plumbed from the supplicant instead of hard-coded.
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Still to validate, in order:
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1. **BDC TX/RX**: EAPOL (`cyw43_tx_eapol`) and 802.3 (`cyw43_tx_eth`) framing, and the inbound `data_offset` handling in `cyw43_poll` (only exercised once EAPOL flows).
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2. **Key install** (`cyw43_set_key`): the 160-byte `wl_wsec_key` layout (CCMP algo, primary-key flag, pairwise vs group MAC).
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3. **End-to-end**: link the host supplicant (`WOLFIP_WITH_SUPPLICANT` + cross-built wolfSSL), reach `AUTHENTICATED` (stops the flap), then DHCP + UDP echo on port 7.
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Other gaps: `op_scan` is a stub (join-by-known-SSID only); the `supp_now_ms()` time source in `main.c` is a placeholder counter and needs a real RP2350 timer; the PMKSA-cache reuse path (PSK re-init) is exercised only by construction, not by a dedicated unit test; SAE-on-hardware stays software-validated this pass.

‎src/port/rp2350_cyw43439/board.h‎

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/* board.h - Pi Pico 2 W (RP2350 + CYW43439) board definitions
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*
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* Copyright (C) 2026 wolfSSL Inc.
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*
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* This file is part of wolfIP TCP/IP stack.
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*
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* wolfIP is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*/
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#ifndef WOLFIP_RP2350_CYW43439_BOARD_H
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#define WOLFIP_RP2350_CYW43439_BOARD_H
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/* RP2350 base addresses (RP2350 datasheet 2.2). */
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#define RP2350_ROM_BASE 0x00000000UL
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#define RP2350_XIP_BASE 0x10000000UL
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#define RP2350_SRAM_BASE 0x20000000UL
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#define RP2350_SRAM_SIZE 0x00082000UL /* 520 KB */
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#define RP2350_APB_BASE 0x40000000UL
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#define RP2350_AHB_BASE 0x50000000UL
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/* SIO (single-cycle IO) - GPIO mailbox/atomic regs for both cores. */
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#define RP2350_SIO_BASE 0xD0000000UL
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/* Pi Pico W and Pico 2 W carrier: the CYW43439 is attached to RP2350 via
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* a constrained gSPI bus (1-bit data line, shared MOSI/MISO through a
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* 470 ohm series resistor). Pin assignment is fixed on the Pico 2 W
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* carrier - see datasheet "Raspberry Pi Pico 2 W" Schematic v0.4.
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*
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* GP23 = WL_REG_ON (power enable; active high)
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* GP24 = SPI data (shared MOSI/MISO via 470 R; doubles as the
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* host-wake IRQ from CYW43 when SPI is idle)
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* GP25 = SPI CS (active low)
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* GP29 = SPI clock
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*
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* The clean-room driver polls GP24 for data-ready; an IRQ path can be
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* added once the polled bringup proves stable (RP2350 erratum E9: edge
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* IRQ on some pin modes can deadlock the core, prefer poll first).
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* These match the pico-sdk cyw43 pin config (WL_CLOCK=29, WL_DATA=24,
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* WL_CS=25, WL_REG_ON=23, WL_HOST_WAKE=24).
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*/
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#define CYW43_PIN_WL_REG_ON 23
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#define CYW43_PIN_SPI_DATA 24
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#define CYW43_PIN_SPI_CS 25
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#define CYW43_PIN_SPI_CLK 29
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#define CYW43_PIN_HOST_IRQ 24
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/* UART0 for stdout console. Pi Pico 2 W exposes UART0 on GP0/GP1 by
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* default. The pico-sdk uses these and so do we. */
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#define UART0_PIN_TX 0
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#define UART0_PIN_RX 1
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#define UART0_BAUD 115200
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#endif /* WOLFIP_RP2350_CYW43439_BOARD_H */

‎src/port/rp2350_cyw43439/config.h‎

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/* config.h - wolfIP configuration for Pi Pico 2 W (RP2350 + CYW43439)
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*
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* Copyright (C) 2026 wolfSSL Inc.
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*
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* This file is part of wolfIP TCP/IP stack.
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*
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* wolfIP is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*/
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#ifndef WOLF_CONFIG_H
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#define WOLF_CONFIG_H
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#ifndef CONFIG_IPFILTER
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#define CONFIG_IPFILTER 0
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#endif
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/* 802.11 air MTU is 2304 (CCMP/QoS overhead); after SDPCM + WHD
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* encapsulation the host sees standard 1500-byte Ethernet frames. Keep
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* LINK_MTU at 1536 to leave room for VLAN tags. */
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#define ETHERNET
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#define LINK_MTU 1536
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/* RP2350 has 520 KB SRAM; we can afford generous socket budgets.
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* 8 TCP * ~9 KB = ~72 KB
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* 3 UDP * ~3 KB = ~9 KB (DHCP + DNS + app)
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* 1 ICMP = ~3 KB
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* wolfIP core + supplicant + driver = ~80 KB
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* CYW43439 firmware blob (XIP, not SRAM) = ~225 KB in flash
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* Total static SRAM ~170 KB, leaves >300 KB for stack + heap (libc).
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*/
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#define MAX_TCPSOCKETS 8
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#define MAX_UDPSOCKETS 3
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#define MAX_ICMPSOCKETS 1
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#define RXBUF_SIZE LINK_MTU
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#define TXBUF_SIZE LINK_MTU
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#define MAX_NEIGHBORS 8
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#define WOLFIP_ARP_PENDING_MAX 4
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#ifndef WOLFIP_MAX_INTERFACES
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#define WOLFIP_MAX_INTERFACES 1
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#endif
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#ifndef WOLFIP_ENABLE_FORWARDING
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#define WOLFIP_ENABLE_FORWARDING 0
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#endif
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#ifndef WOLFIP_ENABLE_LOOPBACK
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#define WOLFIP_ENABLE_LOOPBACK 0
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#endif
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#ifndef WOLFIP_ENABLE_DHCP
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#define WOLFIP_ENABLE_DHCP 1
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#endif
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/* Default Wi-Fi credentials baked into the firmware. Override at build
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* time via -DWOLFIP_WIFI_SSID=... -DWOLFIP_WIFI_PSK=... or edit. */
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#ifndef WOLFIP_WIFI_SSID
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#define WOLFIP_WIFI_SSID "wolfIP-test"
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#endif
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#ifndef WOLFIP_WIFI_PSK
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#define WOLFIP_WIFI_PSK "ThisIsAPassword!"
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#endif
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/* Static IP fallback when DHCP is disabled. */
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#define WOLFIP_IP "192.168.12.11"
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#define WOLFIP_NETMASK "255.255.255.0"
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#define WOLFIP_GW "192.168.12.1"
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#define WOLFIP_STATIC_DNS_IP "8.8.8.8"
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#if WOLFIP_ENABLE_DHCP
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#define DHCP
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#endif
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#endif /* WOLF_CONFIG_H */

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