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PPC32 SHA-256 ASM: small code implementation
Slower but smaller SHA-256 assembly code implementation enabled with: WOLFSSL_PPC32_ASM_SMALL. (--enable-ppc32=small or --enable-ppc32=inline,small)
1 parent c39f1fe commit 62721f4

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Lines changed: 1455 additions & 3 deletions

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configure.ac

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3520,8 +3520,11 @@ then
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inline)
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ENABLED_PPC32_ASM_INLINE=yes
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;;
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small)
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ENABLED_PPC32_ASM_SMALL=yes
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;;
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*)
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AC_MSG_ERROR([Invalid RISC-V option [yes,inline]: $ENABLED_PPC32_ASM.])
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AC_MSG_ERROR([Invalid RISC-V option [yes,inline,small]: $ENABLED_PPC32_ASM.])
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break
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;;
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esac
@@ -3536,6 +3539,10 @@ if test "$ENABLED_PPC32_ASM_INLINE" = "yes"; then
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else
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AM_CCASFLAGS="$AM_CCASFLAGS -DWOLFSSL_PPC32_ASM"
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fi
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if test "$ENABLED_PPC32_ASM_SMALL" = "yes"; then
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AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_PPC32_ASM_SMALL"
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AM_CCASFLAGS="$AM_CCASFLAGS -DWOLFSSL_PPC32_ASM_SMALL"
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fi
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# Xilinx hardened crypto
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AC_ARG_ENABLE([xilinx],

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