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Merge pull request #10278 from twcook86/lpc55s69_crypto
Add wolfCrypt support for lpc55s69 hw crypto
2 parents 3351eb4 + b4a19b5 commit 867ce26

17 files changed

Lines changed: 893 additions & 6 deletions

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.wolfssl_known_macro_extras

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@@ -862,6 +862,15 @@ WOLFSSL_NO_TICKET_EXPIRE
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WOLFSSL_NO_TRUSTED_CERTS_VERIFY
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WOLFSSL_NO_WORD64_OPS
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WOLFSSL_NO_XOR_OPS
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WOLFSSL_NXP_LPC55S6X
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WOLFSSL_NXP_CASPER
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WOLFSSL_NXP_CASPER_ECC_MULMOD
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WOLFSSL_NXP_CASPER_ECC_MUL2ADD
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WOLFSSL_NXP_CASPER_RSA_PUB_EXPTMOD
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WOLFSSL_NXP_HASHCRYPT
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WOLFSSL_NXP_HASHCRYPT_AES
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WOLFSSL_NXP_HASHCRYPT_SHA
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WOLFSSL_NXP_RNG_1
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WOLFSSL_NRF51_AES
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WOLFSSL_OLDTLS_AEAD_CIPHERSUITES
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WOLFSSL_OLD_SET_CURVES_LIST

wolfcrypt/src/aes.c

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@@ -140,6 +140,10 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits
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#include <wolfssl/wolfcrypt/cryptocb.h>
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#endif
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#ifdef WOLFSSL_NXP_HASHCRYPT_AES
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#include <wolfssl/wolfcrypt/port/nxp/hashcrypt_port.h>
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#endif
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#ifdef WOLFSSL_SECO_CAAM
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#include <wolfssl/wolfcrypt/port/caam/wolfcaam.h>
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#endif
@@ -5103,7 +5107,8 @@ static void AesSetKey_C(Aes* aes, const byte* key, word32 keySz, int dir)
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#if defined(WOLF_CRYPTO_CB) || (defined(WOLFSSL_DEVCRYPTO) && \
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(defined(WOLFSSL_DEVCRYPTO_AES) || defined(WOLFSSL_DEVCRYPTO_CBC))) || \
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(defined(WOLFSSL_ASYNC_CRYPT) && defined(WC_ASYNC_ENABLE_AES))
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(defined(WOLFSSL_ASYNC_CRYPT) && defined(WC_ASYNC_ENABLE_AES)) || \
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defined(WOLFSSL_NXP_HASHCRYPT_AES)
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#ifdef WOLF_CRYPTO_CB
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if (aes->devId != INVALID_DEVID)
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#endif
@@ -6477,6 +6482,9 @@ int wc_AesSetIV(Aes* aes, const byte* iv)
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#elif defined(WOLFSSL_DEVCRYPTO_CBC)
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/* implemented in wolfcrypt/src/port/devcrypt/devcrypto_aes.c */
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#elif defined(WOLFSSL_NXP_HASHCRYPT_AES)
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/* implemented in wolfcrypt/src/port/nxp/hashcrypt_port.c */
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#elif defined(WOLFSSL_SILABS_SE_ACCEL)
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/* implemented in wolfcrypt/src/port/silabs/silabs_aes.c */
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@@ -7144,7 +7152,11 @@ int wc_AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
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#define NEED_AES_CTR_SOFT
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#elif defined(WOLFSSL_HAVE_PSA) && !defined(WOLFSSL_PSA_NO_AES)
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/* implemented in wolfcrypt/src/port/psa/psa_aes.c */
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/* implemented in wolfcrypt/src/port/psa/psa_aes.c */
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#elif defined(WOLFSSL_NXP_HASHCRYPT_AES)
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/* implemented in wolfcrypt/src/port/nxp/hashcrypt_port.c */
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#else
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/* Use software based AES counter */
@@ -13939,6 +13951,9 @@ int wc_AesGetKeySize(Aes* aes, word32* keySize)
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#elif defined(WOLFSSL_RISCV_ASM)
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/* implemented in wolfcrypt/src/port/riscv/riscv-64-aes.c */
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#elif defined(WOLFSSL_NXP_HASHCRYPT_AES)
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/* implemented in wolfcrypt/src/port/nxp/hashcrypt_port.c */
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#elif defined(WOLFSSL_SILABS_SE_ACCEL)
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/* implemented in wolfcrypt/src/port/silabs/silabs_aes.c */
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@@ -14234,7 +14249,10 @@ int wc_AesEcbDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
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#if defined(WOLFSSL_AES_CFB)
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#if defined(WOLFSSL_PSOC6_CRYPTO)
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#if defined(WOLFSSL_NXP_HASHCRYPT_AES)
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/* implemented in wolfcrypt/src/port/nxp/hashcrypt_port.c */
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#elif defined(WOLFSSL_PSOC6_CRYPTO)
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int wc_AesCfbEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
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{
@@ -14683,6 +14701,10 @@ int wc_AesCfb8Decrypt(Aes* aes, byte* out, const byte* in, word32 sz)
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#endif /* WOLFSSL_AES_CFB */
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#ifdef WOLFSSL_AES_OFB
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#ifdef WOLFSSL_NXP_HASHCRYPT_AES
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/* implemented in wolfcrypt/src/port/nxp/hashcrypt_port.c */
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#else /* software */
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/* OFB AES mode
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*
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* aes structure holding key to use for encryption
@@ -14785,6 +14807,7 @@ int wc_AesOfbDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
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return AesOfbCrypt_C(aes, out, in, sz);
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}
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#endif /* HAVE_AES_DECRYPT */
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#endif /* software */
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#endif /* WOLFSSL_AES_OFB */
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wolfcrypt/src/include.am

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@@ -71,6 +71,8 @@ EXTRA_DIST += wolfcrypt/src/port/ti/ti-aes.c \
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wolfcrypt/src/port/nxp/dcp_port.c \
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wolfcrypt/src/port/nxp/se050_port.c \
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wolfcrypt/src/port/nxp/README.md \
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wolfcrypt/src/port/nxp/casper_port.c \
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wolfcrypt/src/port/nxp/hashcrypt_port.c \
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wolfcrypt/src/port/atmel/README.md \
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wolfcrypt/src/port/xilinx/xil-sha3.c \
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wolfcrypt/src/port/xilinx/xil-aesgcm.c \

wolfcrypt/src/port/nxp/README.md

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@@ -1,6 +1,47 @@
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# wolfSSL NXP Hardware Acceleration Ports
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wolfSSL supports hardware acceleration on NXP DCP, LTC (KSDK), and SE050.
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wolfSSL supports hardware acceleration on NXP DCP, LTC (KSDK), LPC55S69, and SE050.
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## NXP LPC55S69
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The LPC55S69 is a general purpose edge computing device, with dual ARM
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Cortex-M33 cores running up to 150 MHz, 640/320 KB internal flash/ram,
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TrustZone-M, a DSP accelerator, and extensive cryptographic acceleration.
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wolfSSL supports the following hardware acceleration on the LPC55S69:
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- TRNG
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- HashCrypt (Hash/AES Crypto Engine)
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- AES (128, 192, 256) encrypt/decrypt
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- AES-CBC, AES-ECB, AES-CTR, AES-OFB, AES-CFB
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- SHA-1, SHA-256
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- CASPER (Asymmetric Crypto Accelerator)
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- RSA verify/encrypt/decrypt (up to 4096-bit, public key only)
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### LPC55S69 Hardware Acceleration Caveats
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The following caveats should be noted about the LPC55S69 hardware acceleration:
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- AES-CTR mode fails when the counter wraps from all FF's to 0. User should
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ensure this never happens, by properly managing the iv/counter in use.
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- AES-CFB and AES-OFB only support full 16-byte blocks and multiples thereof.
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Encrypt/Decrypt requests of other sizes will fail.
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- RSA acceleration is only supported for public keys. Private key operations
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will use a fully software implementation.
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- When the HashCrypt engine is in use for SHA-1 or SHA-256, it must not be
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interrupted with another hash request or an AES request. The hash must be
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completed before another operation is requested.
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### wolfSSL LPC55S69 Hardware Acceleration Enable
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To enable only the TRNG, define the following symbol:
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**`WOLFSSL_NXP_RNG_1`**
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To enable all LPC55S69 hardware acceleration, including the TRNG,
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define the following symbol:
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**`WOLFSSL_NXP_LPC55S6X`**
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NOTE: Both can be defined with no problem.
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## NXP SE050
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@@ -10,3 +51,4 @@ see [README_SE050.md](./README_SE050.md).
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## Support
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For questions please email support@wolfssl.com
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