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RISC-V RVV cross-compilation build (qemu 11)

perf(avx512vl): native EVEX int64 shift, signed rotr, compress/expand #72

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perf(avx512vl): native EVEX int64 shift, signed rotr, compress/expand

perf(avx512vl): native EVEX int64 shift, signed rotr, compress/expand #72

Triggered via pull request June 2, 2026 18:21
@DiamonDinoiaDiamonDinoia
opened #1358
DiamonDinoia:perf/avx512vl-pure-wins
Status Success
Total duration 35m 3s
Artifacts –

cross-rvv-arch.yml

on: pull_request
Matrix: build
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