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JohanMabilleJohanMabille
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Merge pull request #1312 from AntoinePrv/cpu-features
Add generic cpu_features
2 parents 6978612 + 6bed918 commit 05b9d84

3 files changed

Lines changed: 91 additions & 50 deletions

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‎include/xsimd/config/xsimd_cpu_features.hpp‎

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/***************************************************************************
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* Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and *
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* Martin Renou *
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* Copyright (c) QuantStack *
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* Copyright (c) Serge Guelton *
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* *
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* Distributed under the terms of the BSD 3-Clause License. *
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* *
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* The full license is in the file LICENSE, distributed with this software. *
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****************************************************************************/
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#ifndef XSIMD_CPU_FEATURES_HPP
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#define XSIMD_CPU_FEATURES_HPP
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#include "./xsimd_cpu_features_arm.hpp"
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#include "./xsimd_cpu_features_ppc.hpp"
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#include "./xsimd_cpu_features_riscv.hpp"
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#include "./xsimd_cpu_features_x86.hpp"
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namespace xsimd
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{
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/**
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* Cross-platform CPU feature detection class.
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*
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* All member functions are safe to work on with all platforms.
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*
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* @warning This class is *not* thread safe.
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* Its internal lazy querying structure makes even `const` member function prone to data race.
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* The structure is also generally not appropriate for directly branching (e.g. on
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* ``cpu_features::avx2``) because it include a branch that the compiler cannot optimize.
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* The current appropriate way to use this class for dynamic dispatching is to store the
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* result of the function calls (e.g. @ref cpu_features) into (static) constants.
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* This is done in @ref xsimd::available_architectures.
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*
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* @see xsimd::dispatch
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* @see xsimd::available_architectures
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*/
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class cpu_features : public ppc_cpu_features,
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public riscv_cpu_features,
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public arm_cpu_features,
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public x86_cpu_features
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{
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};
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}
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#endif

‎include/xsimd/config/xsimd_cpuid.hpp‎

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@@ -13,10 +13,7 @@
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#define XSIMD_CPUID_HPP
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#include "../types/xsimd_all_registers.hpp"
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#include "./xsimd_cpu_features_arm.hpp"
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#include "./xsimd_cpu_features_ppc.hpp"
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#include "./xsimd_cpu_features_riscv.hpp"
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#include "./xsimd_cpu_features_x86.hpp"
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#include "./xsimd_cpu_features.hpp"
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#include "./xsimd_inline.hpp"
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namespace xsimd
@@ -81,58 +78,54 @@ namespace xsimd
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wasm = 1;
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#endif
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// Safe on all platforms, it will be false if non PowerPC.
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const auto ppc_cpu = xsimd::ppc_cpu_features();
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const auto cpu = xsimd::cpu_features();
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vsx = ppc_cpu.vsx();
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vsx = cpu.vsx();
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// Safe on all platforms, it will be all false if non risc-v.
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const auto riscv_cpu = xsimd::riscv_cpu_features();
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rvv128 = cpu.rvv() && (cpu.rvv_size_bytes() >= (128 / 8));
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rvv256 = cpu.rvv() && (cpu.rvv_size_bytes() >= (256 / 8));
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rvv512 = cpu.rvv() && (cpu.rvv_size_bytes() >= (512 / 8));
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rvv128 = riscv_cpu.rvv() && (riscv_cpu.rvv_size_bytes() >= (128 / 8));
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rvv256 = riscv_cpu.rvv() && (riscv_cpu.rvv_size_bytes() >= (256 / 8));
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rvv512 = riscv_cpu.rvv() && (riscv_cpu.rvv_size_bytes() >= (512 / 8));
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neon = cpu.neon();
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neon64 = cpu.neon64();
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i8mm_neon64 = cpu.neon64() && cpu.i8mm();
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// Safe on all platforms, it will be all false if non arm.
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const auto arm_cpu = xsimd::arm_cpu_features();
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// Running SVE128 on a SVE256 machine is more tricky than the x86 equivalent
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// of running SSE code on an AVX machine and requires to explicitly change the
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// vector length using `prctl` (per thread setting).
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// This is something we have not tested and not integrated in xsimd so the safe
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// default is to assume only one valid SVE width at runtime.
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sve128 = cpu.sve() && (cpu.sve_size_bytes() * 8 == 128);
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sve256 = cpu.sve() && (cpu.sve_size_bytes() * 8 == 256);
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sve512 = cpu.sve() && (cpu.sve_size_bytes() * 8 == 512);
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neon = arm_cpu.neon();
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neon64 = arm_cpu.neon64();
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i8mm_neon64 = arm_cpu.neon64() && arm_cpu.i8mm();
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sve128 = arm_cpu.sve() && (arm_cpu.sve_size_bytes() >= (128 / 8));
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sve256 = arm_cpu.sve() && (arm_cpu.sve_size_bytes() >= (256 / 8));
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sve512 = arm_cpu.sve() && (arm_cpu.sve_size_bytes() >= (512 / 8));
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// Safe on all platforms, it will be all false if non x86.
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const auto x86_cpu = xsimd::x86_cpu_features();
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sse2 = x86_cpu.sse2();
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sse3 = x86_cpu.sse3();
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ssse3 = x86_cpu.ssse3();
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sse4_1 = x86_cpu.sse4_1();
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sse4_2 = x86_cpu.sse4_2();
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fma3_sse42 = x86_cpu.fma3();
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sse2 = cpu.sse2();
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sse3 = cpu.sse3();
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ssse3 = cpu.ssse3();
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sse4_1 = cpu.sse4_1();
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sse4_2 = cpu.sse4_2();
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fma3_sse42 = cpu.fma3();
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// sse4a not implemented in cpu_id yet
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// xop not implemented in cpu_id yet
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avx = x86_cpu.avx();
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avx = cpu.avx();
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fma3_avx = avx && fma3_sse42;
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fma4 = x86_cpu.fma4();
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avx2 = x86_cpu.avx2();
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avxvnni = x86_cpu.avxvnni();
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fma4 = cpu.fma4();
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avx2 = cpu.avx2();
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avxvnni = cpu.avxvnni();
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fma3_avx2 = avx2 && fma3_sse42;
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avx512f = x86_cpu.avx512f();
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avx512cd = x86_cpu.avx512cd();
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avx512dq = x86_cpu.avx512dq();
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avx512bw = x86_cpu.avx512bw();
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avx512er = x86_cpu.avx512er();
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avx512pf = x86_cpu.avx512pf();
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avx512ifma = x86_cpu.avx512ifma();
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avx512vbmi = x86_cpu.avx512vbmi();
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avx512vbmi2 = x86_cpu.avx512vbmi2();
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avx512vnni_bw = x86_cpu.avx512vnni_bw();
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avx512f = cpu.avx512f();
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avx512cd = cpu.avx512cd();
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avx512dq = cpu.avx512dq();
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avx512bw = cpu.avx512bw();
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avx512er = cpu.avx512er();
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avx512pf = cpu.avx512pf();
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avx512ifma = cpu.avx512ifma();
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avx512vbmi = cpu.avx512vbmi();
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avx512vbmi2 = cpu.avx512vbmi2();
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avx512vnni_bw = cpu.avx512vnni_bw();
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avx512vnni_vbmi2 = avx512vbmi2 && avx512vnni_bw;
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}
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};

‎test/test_cpu_features.cpp‎

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@@ -52,7 +52,7 @@ namespace detail
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*/
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TEST_CASE("[cpu_features] x86 implication chains")
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{
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xsimd::x86_cpu_features cpu;
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xsimd::cpu_features cpu;
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// SSE implication chain
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CHECK_IMPLICATION(cpu.sse4_2(), cpu.sse4_1());
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TEST_CASE("[cpu_features] x86 features from environment")
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{
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xsimd::x86_cpu_features cpu;
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xsimd::cpu_features cpu;
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CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_SSE2", cpu.sse2());
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CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_SSE3", cpu.sse3());
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TEST_CASE("[cpu_features] arm features from environment")
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{
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xsimd::arm_cpu_features cpu;
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xsimd::cpu_features cpu;
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CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_NEON", cpu.neon());
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CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_NEON64", cpu.neon64());
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TEST_CASE("[cpu_features] risc-v implication chains")
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{
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xsimd::riscv_cpu_features cpu;
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xsimd::cpu_features cpu;
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CHECK_IMPLICATION(cpu.rvv(), cpu.rvv_size_bytes() >= (128 / 8));
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}
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TEST_CASE("[cpu_features] risc-v features from environment")
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{
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xsimd::riscv_cpu_features cpu;
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xsimd::cpu_features cpu;
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CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_RVV", cpu.rvv());
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}
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TEST_CASE("[cpu_features] ppc features from environment")
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{
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xsimd::ppc_cpu_features cpu;
175+
xsimd::cpu_features cpu;
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CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_VSX", cpu.vsx());
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}

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