@@ -63,12 +63,12 @@ namespace xsimd
6363 ARCH_FIELD (neon)
6464 ARCH_FIELD (neon64)
6565 ARCH_FIELD_EX (i8mm<::xsimd::neon64>, i8mm_neon64)
66- ARCH_FIELD_EX (detail::sve<512 >, sve )
67- ARCH_FIELD_EX_REUSE (detail::sve<256 >, sve )
68- ARCH_FIELD_EX_REUSE (detail::sve<128 >, sve )
69- ARCH_FIELD_EX (detail::rvv<512 >, rvv )
70- ARCH_FIELD_EX_REUSE (detail::rvv<256 >, rvv )
71- ARCH_FIELD_EX_REUSE (detail::rvv<128 >, rvv )
66+ ARCH_FIELD_EX (detail::sve<512 >, sve512 )
67+ ARCH_FIELD_EX (detail::sve<256 >, sve256 )
68+ ARCH_FIELD_EX (detail::sve<128 >, sve128 )
69+ ARCH_FIELD_EX (detail::rvv<512 >, rvv512 )
70+ ARCH_FIELD_EX (detail::rvv<256 >, rvv256 )
71+ ARCH_FIELD_EX (detail::rvv<128 >, rvv128 )
7272 ARCH_FIELD (wasm)
7373 ARCH_FIELD (vsx)
7474
@@ -87,15 +87,19 @@ namespace xsimd
8787 // Safe on all platforms, it will be all false if non risc-v.
8888 const auto riscv_cpu = xsimd::riscv_cpu_features ();
8989
90- rvv = riscv_cpu.rvv ();
90+ rvv128 = riscv_cpu.rvv () && (riscv_cpu.rvv_size_bytes () >= (128 / 8 ));
91+ rvv256 = riscv_cpu.rvv () && (riscv_cpu.rvv_size_bytes () >= (256 / 8 ));
92+ rvv512 = riscv_cpu.rvv () && (riscv_cpu.rvv_size_bytes () >= (512 / 8 ));
9193
9294 // Safe on all platforms, it will be all false if non arm.
9395 const auto arm_cpu = xsimd::arm_cpu_features ();
9496
9597 neon = arm_cpu.neon ();
9698 neon64 = arm_cpu.neon64 ();
9799 i8mm_neon64 = arm_cpu.neon64 () && arm_cpu.i8mm ();
98- sve = arm_cpu.sve ();
100+ sve128 = arm_cpu.sve () && (arm_cpu.sve_size_bytes () >= (128 / 8 ));
101+ sve256 = arm_cpu.sve () && (arm_cpu.sve_size_bytes () >= (256 / 8 ));
102+ sve512 = arm_cpu.sve () && (arm_cpu.sve_size_bytes () >= (512 / 8 ));
99103
100104 // Safe on all platforms, it will be all false if non x86.
101105 const auto x86_cpu = xsimd::x86_cpu_features ();
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