Refactor bit utils

AntoinePrv · AntoinePrv · commit 09f23d78a624 · 2026-01-30T14:55:48.000+01:00
diff --git a/include/xsimd/utils/bits.hpp b/include/xsimd/utils/bits.hpp
@@ -0,0 +1,40 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ***************************************************************************/
+
+#ifndef XSIMD_CPUID_UTILS_HPP
+#define XSIMD_CPUID_UTILS_HPP
+
+namespace xsimd
+{
+    namespace utils
+    {
+        template <typename I>
+        constexpr I make_bit_mask(I bit)
+        {
+            return static_cast<I>(I { 1 } << bit);
+        }
+
+        template <typename I, typename... Args>
+        constexpr I make_bit_mask(I bit, Args... bits)
+        {
+            return make_bit_mask<I>(bit) | make_bit_mask<I>(static_cast<I>(bits)...);
+        }
+
+        template <int... Bits, typename I>
+        constexpr bool bit_is_set(I value)
+        {
+            constexpr I mask = make_bit_mask<I>(static_cast<I>(Bits)...);
+            return (value & mask) == mask;
+        }
+    }
+}
+
+#endif
diff --git a/include/xsimd/xsimd_cpu_features_x86.hpp b/include/xsimd/xsimd_cpu_features_x86.hpp
@@ -15,35 +15,16 @@
 #include <cstdint>
 
 #include "./config/xsimd_config.hpp"
+#include "./utils/bits.hpp"
 
 #if XSIMD_TARGET_X86 && defined(_MSC_VER)
-// Contains the definition of __cpuidex
-#include <intrin.h>
+#include <intrin.h> // Contains the definition of __cpuidex
 #endif
 
 namespace xsimd
 {
     namespace detail
     {
-        template <typename I>
-        constexpr I make_bit_mask(I bit)
-        {
-            return static_cast<I>(I { 1 } << bit);
-        }
-
-        template <typename I, typename... Args>
-        constexpr I make_bit_mask(I bit, Args... bits)
-        {
-            return make_bit_mask<I>(bit) | make_bit_mask<I>(static_cast<I>(bits)...);
-        }
-
-        template <int... Bits, typename I>
-        constexpr bool bit_is_set(I value)
-        {
-            constexpr I mask = make_bit_mask<I>(static_cast<I>(Bits)...);
-            return (value & mask) == mask;
-        }
-
         inline void get_cpuid(int reg[4], int level, int count = 0) noexcept;
 
         inline std::uint32_t get_xcr0_low() noexcept;
@@ -83,20 +64,20 @@ namespace xsimd
 
         constexpr bool sse_state_os_enabled() const noexcept
         {
-            return detail::bit_is_set<1>(m_low);
+            return utils::bit_is_set<1>(m_low);
         }
 
         constexpr bool avx_state_os_enabled() const noexcept
         {
             // Check both SSE and AVX bits even though AVX must imply SSE
-            return detail::bit_is_set<1, 2>(m_low);
+            return utils::bit_is_set<1, 2>(m_low);
         }
 
         constexpr bool avx512_state_os_enabled() const noexcept
         {
             // Check all SSE, AVX, and AVX52 bits even though AVX512 must
             // imply AVX and SSE
-            return detail::bit_is_set<1, 2, 6>(m_low);
+            return utils::bit_is_set<1, 2, 6>(m_low);
         }
 
     private:
@@ -141,32 +122,32 @@ namespace xsimd
 
         constexpr bool sse2() const noexcept
         {
-            return detail::bit_is_set<26>(m_regs.reg1[3]);
+            return utils::bit_is_set<26>(m_regs.reg1[3]);
         }
 
         constexpr bool sse3() const noexcept
         {
-            return detail::bit_is_set<0>(m_regs.reg1[2]);
+            return utils::bit_is_set<0>(m_regs.reg1[2]);
         }
 
         constexpr bool ssse3() const noexcept
         {
-            return detail::bit_is_set<9>(m_regs.reg1[2]);
+            return utils::bit_is_set<9>(m_regs.reg1[2]);
         }
 
         constexpr bool sse4_1() const noexcept
         {
-            return detail::bit_is_set<19>(m_regs.reg1[2]);
+            return utils::bit_is_set<19>(m_regs.reg1[2]);
         }
 
         constexpr bool sse4_2() const noexcept
         {
-            return detail::bit_is_set<20>(m_regs.reg1[2]);
+            return utils::bit_is_set<20>(m_regs.reg1[2]);
         }
 
         constexpr bool fma3() const noexcept
         {
-            return detail::bit_is_set<12>(m_regs.reg1[2]);
+            return utils::bit_is_set<12>(m_regs.reg1[2]);
         }
 
         /**
@@ -181,77 +162,77 @@ namespace xsimd
          */
         constexpr bool osxsave() const noexcept
         {
-            return detail::bit_is_set<27>(m_regs.reg1[2]);
+            return utils::bit_is_set<27>(m_regs.reg1[2]);
         }
 
         constexpr bool avx() const noexcept
         {
-            return detail::bit_is_set<28>(m_regs.reg1[2]);
+            return utils::bit_is_set<28>(m_regs.reg1[2]);
         }
 
         constexpr bool avx2() const noexcept
         {
-            return detail::bit_is_set<5>(m_regs.reg7[1]);
+            return utils::bit_is_set<5>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512f() const noexcept
         {
-            return detail::bit_is_set<16>(m_regs.reg7[1]);
+            return utils::bit_is_set<16>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512dq() const noexcept
         {
-            return detail::bit_is_set<17>(m_regs.reg7[1]);
+            return utils::bit_is_set<17>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512ifma() const noexcept
         {
-            return detail::bit_is_set<21>(m_regs.reg7[1]);
+            return utils::bit_is_set<21>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512pf() const noexcept
         {
-            return detail::bit_is_set<26>(m_regs.reg7[1]);
+            return utils::bit_is_set<26>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512er() const noexcept
         {
-            return detail::bit_is_set<27>(m_regs.reg7[1]);
+            return utils::bit_is_set<27>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512cd() const noexcept
         {
-            return detail::bit_is_set<28>(m_regs.reg7[1]);
+            return utils::bit_is_set<28>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512bw() const noexcept
         {
-            return detail::bit_is_set<30>(m_regs.reg7[1]);
+            return utils::bit_is_set<30>(m_regs.reg7[1]);
         }
 
         constexpr bool avx512vbmi() const noexcept
         {
-            return detail::bit_is_set<1>(m_regs.reg7[2]);
+            return utils::bit_is_set<1>(m_regs.reg7[2]);
         }
 
         constexpr bool avx512vbmi2() const noexcept
         {
-            return detail::bit_is_set<6>(m_regs.reg7[2]);
+            return utils::bit_is_set<6>(m_regs.reg7[2]);
         }
 
         constexpr bool avx512vnni_bw() const noexcept
         {
-            return detail::bit_is_set<11>(m_regs.reg7[2]);
+            return utils::bit_is_set<11>(m_regs.reg7[2]);
         }
 
         constexpr bool avxvnni() const noexcept
         {
-            return detail::bit_is_set<4>(m_regs.reg7a[0]);
+            return utils::bit_is_set<4>(m_regs.reg7a[0]);
         }
 
         constexpr bool fma4() const noexcept
         {
-            return detail::bit_is_set<16>(m_regs.reg8[2]);
+            return utils::bit_is_set<16>(m_regs.reg8[2]);
         }
 
     private:

Original file line number	Diff line number	Diff line change
`@@ -15,35 +15,16 @@`
`15`	`15`	`#include <cstdint>`
`16`	`16`
`17`	`17`	`#include "./config/xsimd_config.hpp"`
	`18`	`+#include "./utils/bits.hpp"`
`18`	`19`
`19`	`20`	`#if XSIMD_TARGET_X86 && defined(_MSC_VER)`
`20`		`-// Contains the definition of __cpuidex`
`21`		`-#include <intrin.h>`
	`21`	`+#include <intrin.h> // Contains the definition of __cpuidex`
`22`	`22`	`#endif`
`23`	`23`
`24`	`24`	`namespace xsimd`
`25`	`25`	`{`
`26`	`26`	`namespace detail`
`27`	`27`	`{`
`28`		`- template <typename I>`
`29`		`- constexpr I make_bit_mask(I bit)`
`30`		`- {`
`31`		`- return static_cast<I>(I { 1 } << bit);`
`32`		`- }`
`33`		`-`
`34`		`- template <typename I, typename... Args>`
`35`		`- constexpr I make_bit_mask(I bit, Args... bits)`
`36`		`- {`
`37`		`- return make_bit_mask<I>(bit) \| make_bit_mask<I>(static_cast<I>(bits)...);`
`38`		`- }`
`39`		`-`
`40`		`- template <int... Bits, typename I>`
`41`		`- constexpr bool bit_is_set(I value)`
`42`		`- {`
`43`		`- constexpr I mask = make_bit_mask<I>(static_cast<I>(Bits)...);`
`44`		`- return (value & mask) == mask;`
`45`		`- }`
`46`		`-`
`47`	`28`	`inline void get_cpuid(int reg[4], int level, int count = 0) noexcept;`
`48`	`29`
`49`	`30`	`inline std::uint32_t get_xcr0_low() noexcept;`
`@@ -83,20 +64,20 @@ namespace xsimd`
`83`	`64`
`84`	`65`	`constexpr bool sse_state_os_enabled() const noexcept`
`85`	`66`	`{`
`86`		`- return detail::bit_is_set<1>(m_low);`
	`67`	`+ return utils::bit_is_set<1>(m_low);`
`87`	`68`	`}`
`88`	`69`
`89`	`70`	`constexpr bool avx_state_os_enabled() const noexcept`
`90`	`71`	`{`
`91`	`72`	`// Check both SSE and AVX bits even though AVX must imply SSE`
`92`		`- return detail::bit_is_set<1, 2>(m_low);`
	`73`	`+ return utils::bit_is_set<1, 2>(m_low);`
`93`	`74`	`}`
`94`	`75`
`95`	`76`	`constexpr bool avx512_state_os_enabled() const noexcept`
`96`	`77`	`{`
`97`	`78`	`// Check all SSE, AVX, and AVX52 bits even though AVX512 must`
`98`	`79`	`// imply AVX and SSE`
`99`		`- return detail::bit_is_set<1, 2, 6>(m_low);`
	`80`	`+ return utils::bit_is_set<1, 2, 6>(m_low);`
`100`	`81`	`}`
`101`	`82`
`102`	`83`	`private:`
`@@ -141,32 +122,32 @@ namespace xsimd`
`141`	`122`
`142`	`123`	`constexpr bool sse2() const noexcept`
`143`	`124`	`{`
`144`		`- return detail::bit_is_set<26>(m_regs.reg1[3]);`
	`125`	`+ return utils::bit_is_set<26>(m_regs.reg1[3]);`
`145`	`126`	`}`
`146`	`127`
`147`	`128`	`constexpr bool sse3() const noexcept`
`148`	`129`	`{`
`149`		`- return detail::bit_is_set<0>(m_regs.reg1[2]);`
	`130`	`+ return utils::bit_is_set<0>(m_regs.reg1[2]);`
`150`	`131`	`}`
`151`	`132`
`152`	`133`	`constexpr bool ssse3() const noexcept`
`153`	`134`	`{`
`154`		`- return detail::bit_is_set<9>(m_regs.reg1[2]);`
	`135`	`+ return utils::bit_is_set<9>(m_regs.reg1[2]);`
`155`	`136`	`}`
`156`	`137`
`157`	`138`	`constexpr bool sse4_1() const noexcept`
`158`	`139`	`{`
`159`		`- return detail::bit_is_set<19>(m_regs.reg1[2]);`
	`140`	`+ return utils::bit_is_set<19>(m_regs.reg1[2]);`
`160`	`141`	`}`
`161`	`142`
`162`	`143`	`constexpr bool sse4_2() const noexcept`
`163`	`144`	`{`
`164`		`- return detail::bit_is_set<20>(m_regs.reg1[2]);`
	`145`	`+ return utils::bit_is_set<20>(m_regs.reg1[2]);`
`165`	`146`	`}`
`166`	`147`
`167`	`148`	`constexpr bool fma3() const noexcept`
`168`	`149`	`{`
`169`		`- return detail::bit_is_set<12>(m_regs.reg1[2]);`
	`150`	`+ return utils::bit_is_set<12>(m_regs.reg1[2]);`
`170`	`151`	`}`
`171`	`152`
`172`	`153`	`/**`
`@@ -181,77 +162,77 @@ namespace xsimd`
`181`	`162`	`*/`
`182`	`163`	`constexpr bool osxsave() const noexcept`
`183`	`164`	`{`
`184`		`- return detail::bit_is_set<27>(m_regs.reg1[2]);`
	`165`	`+ return utils::bit_is_set<27>(m_regs.reg1[2]);`
`185`	`166`	`}`
`186`	`167`
`187`	`168`	`constexpr bool avx() const noexcept`
`188`	`169`	`{`
`189`		`- return detail::bit_is_set<28>(m_regs.reg1[2]);`
	`170`	`+ return utils::bit_is_set<28>(m_regs.reg1[2]);`
`190`	`171`	`}`
`191`	`172`
`192`	`173`	`constexpr bool avx2() const noexcept`
`193`	`174`	`{`
`194`		`- return detail::bit_is_set<5>(m_regs.reg7[1]);`
	`175`	`+ return utils::bit_is_set<5>(m_regs.reg7[1]);`
`195`	`176`	`}`
`196`	`177`
`197`	`178`	`constexpr bool avx512f() const noexcept`
`198`	`179`	`{`
`199`		`- return detail::bit_is_set<16>(m_regs.reg7[1]);`
	`180`	`+ return utils::bit_is_set<16>(m_regs.reg7[1]);`
`200`	`181`	`}`
`201`	`182`
`202`	`183`	`constexpr bool avx512dq() const noexcept`
`203`	`184`	`{`
`204`		`- return detail::bit_is_set<17>(m_regs.reg7[1]);`
	`185`	`+ return utils::bit_is_set<17>(m_regs.reg7[1]);`
`205`	`186`	`}`
`206`	`187`
`207`	`188`	`constexpr bool avx512ifma() const noexcept`
`208`	`189`	`{`
`209`		`- return detail::bit_is_set<21>(m_regs.reg7[1]);`
	`190`	`+ return utils::bit_is_set<21>(m_regs.reg7[1]);`
`210`	`191`	`}`
`211`	`192`
`212`	`193`	`constexpr bool avx512pf() const noexcept`
`213`	`194`	`{`
`214`		`- return detail::bit_is_set<26>(m_regs.reg7[1]);`
	`195`	`+ return utils::bit_is_set<26>(m_regs.reg7[1]);`
`215`	`196`	`}`
`216`	`197`
`217`	`198`	`constexpr bool avx512er() const noexcept`
`218`	`199`	`{`
`219`		`- return detail::bit_is_set<27>(m_regs.reg7[1]);`
	`200`	`+ return utils::bit_is_set<27>(m_regs.reg7[1]);`
`220`	`201`	`}`
`221`	`202`
`222`	`203`	`constexpr bool avx512cd() const noexcept`
`223`	`204`	`{`
`224`		`- return detail::bit_is_set<28>(m_regs.reg7[1]);`
	`205`	`+ return utils::bit_is_set<28>(m_regs.reg7[1]);`
`225`	`206`	`}`
`226`	`207`
`227`	`208`	`constexpr bool avx512bw() const noexcept`
`228`	`209`	`{`
`229`		`- return detail::bit_is_set<30>(m_regs.reg7[1]);`
	`210`	`+ return utils::bit_is_set<30>(m_regs.reg7[1]);`
`230`	`211`	`}`
`231`	`212`
`232`	`213`	`constexpr bool avx512vbmi() const noexcept`
`233`	`214`	`{`
`234`		`- return detail::bit_is_set<1>(m_regs.reg7[2]);`
	`215`	`+ return utils::bit_is_set<1>(m_regs.reg7[2]);`
`235`	`216`	`}`
`236`	`217`
`237`	`218`	`constexpr bool avx512vbmi2() const noexcept`
`238`	`219`	`{`
`239`		`- return detail::bit_is_set<6>(m_regs.reg7[2]);`
	`220`	`+ return utils::bit_is_set<6>(m_regs.reg7[2]);`
`240`	`221`	`}`
`241`	`222`
`242`	`223`	`constexpr bool avx512vnni_bw() const noexcept`
`243`	`224`	`{`
`244`		`- return detail::bit_is_set<11>(m_regs.reg7[2]);`
	`225`	`+ return utils::bit_is_set<11>(m_regs.reg7[2]);`
`245`	`226`	`}`
`246`	`227`
`247`	`228`	`constexpr bool avxvnni() const noexcept`
`248`	`229`	`{`
`249`		`- return detail::bit_is_set<4>(m_regs.reg7a[0]);`
	`230`	`+ return utils::bit_is_set<4>(m_regs.reg7a[0]);`
`250`	`231`	`}`
`251`	`232`
`252`	`233`	`constexpr bool fma4() const noexcept`
`253`	`234`	`{`
`254`		`- return detail::bit_is_set<16>(m_regs.reg8[2]);`
	`235`	`+ return utils::bit_is_set<16>(m_regs.reg8[2]);`
`255`	`236`	`}`
`256`	`237`
`257`	`238`	`private:`