Use vshrq_n instead of vcntq

Obviates final division.

Author: onalante-ebay

include/xsimd/arch/xsimd_neon.hpp

@@ -3362,16 +3362,51 @@ namespace xsimd
         /*********
          * count *
          *********/
-        template <class A, class T>
+
+        // NOTE: Extracting a u32 for the return value saves two instructions on 32-bit ARM:
+        // <https://godbolt.org/z/PYn4na8sY>.
+
+        template <class A, class T, detail::enable_sized_t<T, 1> = 0>
+        XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon>) noexcept
+        {
+            uint8x16_t msbs = vshrq_n_u8(self, 7);
+            uint64x2_t psum = vpaddlq_u32(vpaddlq_u16(vpaddlq_u8(msbs)));
+            uint64x1_t total = vadd_u64(vget_low_u64(psum), vget_high_u64(psum));
+
+            assert(vget_lane_u64(total, 0) <= std::numeric_limits<uint32_t>::max());
+            return vget_lane_u32(vreinterpret_u32_u64(total), 0);
+        }
+
+        template <class A, class T, detail::enable_sized_t<T, 2> = 0>
         XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon>) noexcept
         {
-            uint8x16_t popcnts = vcntq_u8(bitwise_cast<uint8_t>(bitwise_cast(self)));
-            uint64x2_t psum = vpaddlq_u32(vpaddlq_u16(vpaddlq_u8(popcnts)));
+            uint16x8_t msbs = vshrq_n_u16(self, 15);
+            uint64x2_t psum = vpaddlq_u32(vpaddlq_u16(msbs));
             uint64x1_t total = vadd_u64(vget_low_u64(psum), vget_high_u64(psum));
 
-            // NOTE: Extracting a u32 saves two instructions on 32-bit ARM: <https://godbolt.org/z/PYn4na8sY>.
-            assert(vget_lane_u64(total) <= constants::maxvalue<uint32_t>());
-            return vget_lane_u32(vreinterpret_u32_u64(total), 0) / (sizeof(T) * 8);
+            assert(vget_lane_u64(total, 0) <= std::numeric_limits<uint32_t>::max());
+            return vget_lane_u32(vreinterpret_u32_u64(total), 0);
+        }
+
+        template <class A, class T, detail::enable_sized_t<T, 4> = 0>
+        XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon>) noexcept
+        {
+            uint32x4_t msbs = vshrq_n_u32(self, 31);
+            uint64x2_t psum = vpaddlq_u32(msbs);
+            uint64x1_t total = vadd_u64(vget_low_u64(psum), vget_high_u64(psum));
+
+            assert(vget_lane_u64(total, 0) <= std::numeric_limits<uint32_t>::max());
+            return vget_lane_u32(vreinterpret_u32_u64(total), 0);
+        }
+
+        template <class A, class T, detail::enable_sized_t<T, 8> = 0>
+        XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon>) noexcept
+        {
+            uint64x2_t msbs = vshrq_n_u64(self, 63);
+            uint64x1_t total = vadd_u64(vget_low_u64(msbs), vget_high_u64(msbs));
+
+            assert(vget_lane_u64(total, 0) <= std::numeric_limits<uint32_t>::max());
+            return vget_lane_u32(vreinterpret_u32_u64(total), 0);
         }
 
 #define WRAP_MASK_OP(OP)                                                               \

include/xsimd/arch/xsimd_neon64.hpp

@@ -655,10 +655,28 @@ namespace xsimd
         /*********
          * count *
          *********/
-        template <class A, class T>
+        template <class A, class T, detail::enable_sized_t<T, 1> = 0>
+        XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon64>) noexcept
+        {
+            return vaddvq_u8(vshrq_n_u8(self, 7));
+        }
+
+        template <class A, class T, detail::enable_sized_t<T, 2> = 0>
+        XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon64>) noexcept
+        {
+            return vaddvq_u16(vshrq_n_u16(self, 15));
+        }
+
+        template <class A, class T, detail::enable_sized_t<T, 4> = 0>
+        XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon64>) noexcept
+        {
+            return vaddvq_u32(vshrq_n_u32(self, 31));
+        }
+
+        template <class A, class T, detail::enable_sized_t<T, 8> = 0>
         XSIMD_INLINE size_t count(batch_bool<T, A> const& self, requires_arch<neon64>) noexcept
         {
-            return vaddlvq_u8(vcntq_u8(bitwise_cast<uint8_t>(bitwise_cast(self)))) / (sizeof(T) * 8);
+            return vaddvq_u64(vshrq_n_u64(self, 63));
         }
 
         /*******