chore: misc small fixes touched while debugging masked memory

- sse2 store_masked: align call signature to the (Mode, common{}) shape
- avx512vl_register: doc comment AVX512DQ -> AVX512VL typo
- isa.hpp: include _128 headers before wider arch so the AVX half-fold's
  recursive call resolves at parse time (load-bearing for the upcoming
  perf change); wrap in clang-format off/on
- avx_128 swizzle: split the dynamic-mask overload into per-type ovlds
  for true C++14 builds where XSIMD_IF_CONSTEXPR is plain 'if' and both
  branches must type-check

Author: DiamonDinoia

include/xsimd/arch/xsimd_avx_128.hpp

@@ -129,20 +129,20 @@ namespace xsimd
         }
 
         // swizzle (dynamic mask)
-        template <class A, class T, class ITy, class = std::enable_if_t<std::is_floating_point<T>::value && sizeof(T) == sizeof(ITy)>>
-        XSIMD_INLINE batch<T, A> swizzle(batch<T, A> const& self, batch<ITy, A> mask, requires_arch<avx_128>) noexcept
-        {
-            XSIMD_IF_CONSTEXPR(std::is_same<T, float>::value)
-            {
-                return _mm_permutevar_ps(self, mask);
-            }
-            else
-            {
-                // VPERMILPD's variable control reads bit 1 of each 64-bit selector
-                // (bit 0 is ignored), so a {0,1} index needs to become {0,2}.
-                // Negation is a cheap alternative to a left shift by 1.
-                return _mm_permutevar_pd(self, -mask);
-            }
+        template <class A, class ITy>
+        XSIMD_INLINE batch<float, A> swizzle(batch<float, A> const& self, batch<ITy, A> mask, requires_arch<avx_128>) noexcept
+        {
+            static_assert(sizeof(float) == sizeof(ITy), "index type must match value width");
+            return _mm_permutevar_ps(self, mask);
+        }
+        template <class A, class ITy>
+        XSIMD_INLINE batch<double, A> swizzle(batch<double, A> const& self, batch<ITy, A> mask, requires_arch<avx_128>) noexcept
+        {
+            static_assert(sizeof(double) == sizeof(ITy), "index type must match value width");
+            // VPERMILPD's variable control reads bit 1 of each 64-bit selector
+            // (bit 0 is ignored), so a {0,1} index needs to become {0,2}.
+            // Negation is a cheap alternative to a left shift by 1.
+            return _mm_permutevar_pd(self, -mask);
         }
 
         // swizzle (constant mask)

include/xsimd/arch/xsimd_isa.hpp

@@ -48,8 +48,11 @@
 #endif
 
 #if XSIMD_WITH_AVX
-#include "./xsimd_avx.hpp"
+// clang-format off
+// _128 first: avx half-fold recursive call needs avx_128 visible at parse time.
 #include "./xsimd_avx_128.hpp"
+#include "./xsimd_avx.hpp"
+// clang-format on
 #endif
 
 #if XSIMD_WITH_FMA3_AVX
@@ -61,8 +64,10 @@
 #endif
 
 #if XSIMD_WITH_AVX2
-#include "./xsimd_avx2.hpp"
+// clang-format off
 #include "./xsimd_avx2_128.hpp"
+#include "./xsimd_avx2.hpp"
+// clang-format on
 #endif
 
 #if XSIMD_WITH_FMA3_AVX2

include/xsimd/arch/xsimd_sse2.hpp

@@ -2331,7 +2331,7 @@ namespace xsimd
             }
             else
             {
-                store_masked<A>(mem, src, mask, requires_arch<common> {});
+                store_masked<A>(mem, src, mask, aligned_mode {}, common {});
             }
         }
 

include/xsimd/types/xsimd_avx512vl_register.hpp

@@ -20,7 +20,7 @@ namespace xsimd
     /**
      * @ingroup architectures
      *
-     * AVX512DQ instructions
+     * AVX512VL instructions
      */
     struct avx512vl : avx512cd
     {