@@ -2375,14 +2375,12 @@ namespace xsimd
23752375 }
23762376
23772377 template <class A , class T >
2378- XSIMD_INLINE bool all_positive (batch<T, A> const & b) noexcept
2378+ XSIMD_INLINE bool shifts_all_positive (batch<T, A> const & b) noexcept
23792379 {
2380- for (std::size_t k = 0 ; k < b.size ; ++k)
2381- {
2382- if (b.get (k) < 0 )
2383- return false ;
2384- }
2385- return true ;
2380+ std::array<T, batch<T, A>::size> tmp = {};
2381+ b.store_unaligned (tmp.begin ());
2382+ return std::all_of (tmp.begin (), tmp.end (), [](T x)
2383+ { return x >= 0 ; });
23862384 }
23872385 }
23882386
@@ -2398,7 +2396,7 @@ namespace xsimd
23982396 XSIMD_INLINE batch<T, A> bitwise_lshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
23992397 {
24002398 // Blindly converting to signed since out of bounds shifts are UB anyways
2401- assert (detail::all_positive (rhs));
2399+ assert (detail::shifts_all_positive (rhs));
24022400 return vshlq_u8 (lhs, vreinterpretq_s8_u8 (rhs));
24032401 }
24042402
@@ -2412,7 +2410,7 @@ namespace xsimd
24122410 XSIMD_INLINE batch<T, A> bitwise_lshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
24132411 {
24142412 // Blindly converting to signed since out of bounds shifts are UB anyways
2415- assert (detail::all_positive (rhs));
2413+ assert (detail::shifts_all_positive (rhs));
24162414 return vshlq_u16 (lhs, vreinterpretq_s16_u16 (rhs));
24172415 }
24182416
@@ -2426,7 +2424,7 @@ namespace xsimd
24262424 XSIMD_INLINE batch<T, A> bitwise_lshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
24272425 {
24282426 // Blindly converting to signed since out of bounds shifts are UB anyways
2429- assert (detail::all_positive (rhs));
2427+ assert (detail::shifts_all_positive (rhs));
24302428 return vshlq_u32 (lhs, vreinterpretq_s32_u32 (rhs));
24312429 }
24322430
@@ -2440,7 +2438,7 @@ namespace xsimd
24402438 XSIMD_INLINE batch<T, A> bitwise_lshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
24412439 {
24422440 // Blindly converting to signed since out of bounds shifts are UB
2443- assert (detail::all_positive (rhs));
2441+ assert (detail::shifts_all_positive (rhs));
24442442 return vshlq_u64 (lhs, vreinterpretq_s64_u64 (rhs));
24452443 }
24462444
@@ -2642,7 +2640,7 @@ namespace xsimd
26422640 XSIMD_INLINE batch<T, A> bitwise_rshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
26432641 {
26442642 // Blindly converting to signed since out of bounds shifts are UB anyways
2645- assert (detail::all_positive (rhs));
2643+ assert (detail::shifts_all_positive (rhs));
26462644 return vshlq_u8 (lhs, vnegq_s8 (vreinterpretq_s8_u8 (rhs)));
26472645 }
26482646
@@ -2656,7 +2654,7 @@ namespace xsimd
26562654 XSIMD_INLINE batch<T, A> bitwise_rshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
26572655 {
26582656 // Blindly converting to signed since out of bounds shifts are UB anyways
2659- assert (detail::all_positive (rhs));
2657+ assert (detail::shifts_all_positive (rhs));
26602658 return vshlq_u16 (lhs, vnegq_s16 (vreinterpretq_s16_u16 (rhs)));
26612659 }
26622660
@@ -2670,7 +2668,7 @@ namespace xsimd
26702668 XSIMD_INLINE batch<T, A> bitwise_rshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
26712669 {
26722670 // Blindly converting to signed since out of bounds shifts are UB anyways
2673- assert (detail::all_positive (rhs));
2671+ assert (detail::shifts_all_positive (rhs));
26742672 return vshlq_u32 (lhs, vnegq_s32 (vreinterpretq_s32_u32 (rhs)));
26752673 }
26762674
@@ -2684,7 +2682,7 @@ namespace xsimd
26842682 XSIMD_INLINE batch<T, A> bitwise_rshift (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon> req) noexcept
26852683 {
26862684 // Blindly converting to signed since out of bounds shifts are UB anyways
2687- assert (detail::all_positive (rhs));
2685+ assert (detail::shifts_all_positive (rhs));
26882686 using S = std::make_signed_t <T>;
26892687 return vshlq_u64 (lhs, neg (batch<S, A>(vreinterpretq_s64_u64 (rhs)), req).data );
26902688 }
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