Add riscv_cpu_features

Author: AntoinePrv

include/xsimd/config/xsimd_cpu_features_riscv.hpp

@@ -0,0 +1,75 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ***************************************************************************/
+
+#ifndef XSIMD_CPU_FEATURES_RISCV_HPP
+#define XSIMD_CPU_FEATURES_RISCV_HPP
+
+#include "./xsimd_config.hpp"
+
+#if XSIMD_TARGET_RISCV && XSIMD_HAVE_LINUX_GETAUXVAL
+#include "../utils/bits.hpp"
+#include "./xsimd_getauxval.hpp"
+
+// HWCAP_XXX masks to use on getauxval results.
+// Header does not exists on all architectures and masks are architecture
+// specific.
+#include <asm/hwcap.h>
+
+// Possibly missing on older Linux distributions
+#ifndef HWCAP_V
+#define HWCAP_V (1 << ('V' - 'A'))
+#endif
+
+#endif // XSIMD_TARGET_RISCV && XSIMD_HAVE_LINUX_GETAUXVAL
+
+namespace xsimd
+{
+    class riscv_cpu_features
+    {
+    public:
+        riscv_cpu_features() noexcept = default;
+
+        inline bool rvv() const noexcept
+        {
+#if XSIMD_TARGET_RISCV && XSIMD_HAVE_LINUX_GETAUXVAL
+            return hwcap().has_feature(HWCAP_V);
+#else
+            return false;
+#endif
+        }
+
+    private:
+#if XSIMD_TARGET_RISCV && XSIMD_HAVE_LINUX_GETAUXVAL
+        enum class status
+        {
+            hwcap_valid = 0,
+        };
+
+        using status_bitset = utils::uint_bitset<status, std::uint32_t>;
+
+        mutable status_bitset m_status {};
+
+        mutable xsimd::linux_auxval m_hwcap {};
+
+        inline xsimd::linux_auxval const& hwcap() const noexcept
+        {
+            if (!m_status.bit_is_set<status::hwcap_valid>())
+            {
+                m_hwcap = xsimd::linux_auxval::read(AT_HWCAP);
+                m_status.set_bit<status::hwcap_valid>();
+            }
+            return m_hwcap;
+        }
+#endif
+    };
+}
+
+#endif

include/xsimd/config/xsimd_cpuid.hpp

@@ -14,14 +14,10 @@
 
 #include "../types/xsimd_all_registers.hpp"
 #include "./xsimd_cpu_features_arm.hpp"
+#include "./xsimd_cpu_features_riscv.hpp"
 #include "./xsimd_cpu_features_x86.hpp"
 #include "./xsimd_inline.hpp"
 
-#if XSIMD_HAVE_LINUX_GETAUXVAL && defined(__riscv_vector)
-#include <asm/hwcap.h>
-#include <sys/auxv.h>
-#endif
-
 namespace xsimd
 {
     namespace detail
@@ -88,15 +84,10 @@ namespace xsimd
                 vsx = 1;
 #endif
 
-#if XSIMD_HAVE_LINUX_GETAUXVAL
-#if defined(__riscv_vector) && defined(__riscv_v_fixed_vlen) && __riscv_v_fixed_vlen > 0
+                // Safe on all platforms, it will be all false if non arm.
+                const auto riscv_cpu = xsimd::riscv_cpu_features();
 
-#ifndef HWCAP_V
-#define HWCAP_V (1 << ('V' - 'A'))
-#endif
-                rvv = bool(getauxval(AT_HWCAP) & HWCAP_V);
-#endif
-#endif
+                rvv = riscv_cpu.rvv();
 
                 // Safe on all platforms, it will be all false if non arm.
                 const auto arm_cpu = xsimd::arm_cpu_features();