feat: add runtime batch_bool mask overloads for avx_128 / avx2_128

Mirror the AVX/AVX2 runtime-mask load_masked / store_masked overloads
on the new 128-bit SSE-register variants of those ISAs:

- avx_128: float / double via _mm_maskload_ps/pd, _mm_maskstore_ps/pd
- avx2_128: 32/64-bit integers via _mm_maskload_epi32/64, _mm_maskstore_epi32/64

8/16-bit integers continue to fall through to the scalar common path
(no native maskload/store intrinsic at those widths). Both alignment
modes route to the same intrinsic since masked-off lanes do not fault.

Author: DiamonDinoia

include/xsimd/arch/xsimd_avx2_128.hpp

@@ -133,6 +133,43 @@ namespace xsimd
             return _mm_maskstore_epi64((int64_t*)mem, mask.as_batch(), src);
         }
 
+        // Runtime-mask load for 32/64-bit integers on AVX2-128. 8/16-bit
+        // integers fall back to the scalar common path: there is no native
+        // _mm_maskload for those widths, and a load-then-blend would break
+        // fault-suppression at page boundaries (the main reason callers ask
+        // for a masked load). Both aligned_mode and unaligned_mode route to
+        // the same intrinsic — masked-off lanes do not fault regardless of
+        // alignment.
+        template <class A, class T, class Mode>
+        XSIMD_INLINE std::enable_if_t<std::is_integral<T>::value && (sizeof(T) == 4 || sizeof(T) == 8), batch<T, A>>
+        load_masked(T const* mem, batch_bool<T, A> mask, convert<T>, Mode, requires_arch<avx2_128>) noexcept
+        {
+            XSIMD_IF_CONSTEXPR(sizeof(T) == 4)
+            {
+                return _mm_maskload_epi32(reinterpret_cast<const int*>(mem), __m128i(mask));
+            }
+            else
+            {
+                return _mm_maskload_epi64(reinterpret_cast<const long long*>(mem), __m128i(mask));
+            }
+        }
+
+        // Runtime-mask store for 32/64-bit integers on AVX2-128. Same
+        // fault-suppression semantics as the masked loads above.
+        template <class A, class T, class Mode>
+        XSIMD_INLINE std::enable_if_t<std::is_integral<T>::value && (sizeof(T) == 4 || sizeof(T) == 8), void>
+        store_masked(T* mem, batch<T, A> const& src, batch_bool<T, A> mask, Mode, requires_arch<avx2_128>) noexcept
+        {
+            XSIMD_IF_CONSTEXPR(sizeof(T) == 4)
+            {
+                _mm_maskstore_epi32(reinterpret_cast<int*>(mem), __m128i(mask), __m128i(src));
+            }
+            else
+            {
+                _mm_maskstore_epi64(reinterpret_cast<long long*>(mem), __m128i(mask), __m128i(src));
+            }
+        }
+
         // gather
         template <class T, class A, class U, detail::enable_sized_integral_t<T, 4> = 0, detail::enable_sized_integral_t<U, 4> = 0>
         XSIMD_INLINE batch<T, A> gather(batch<T, A> const&, T const* src, batch<U, A> const& index,

include/xsimd/arch/xsimd_avx_128.hpp

@@ -115,6 +115,22 @@ namespace xsimd
             return _mm_maskload_pd(mem, mask.as_batch());
         }
 
+        // Runtime-mask load for float/double on AVX-128. Both aligned_mode and
+        // unaligned_mode map to _mm_maskload_* — the intrinsic does not fault
+        // on masked-off lanes, so partial loads across page boundaries are safe.
+        template <class A, class Mode>
+        XSIMD_INLINE batch<float, A>
+        load_masked(float const* mem, batch_bool<float, A> mask, convert<float>, Mode, requires_arch<avx_128>) noexcept
+        {
+            return _mm_maskload_ps(mem, _mm_castps_si128(mask));
+        }
+        template <class A, class Mode>
+        XSIMD_INLINE batch<double, A>
+        load_masked(double const* mem, batch_bool<double, A> mask, convert<double>, Mode, requires_arch<avx_128>) noexcept
+        {
+            return _mm_maskload_pd(mem, _mm_castpd_si128(mask));
+        }
+
         // store_masked
         template <class A, bool... Values, class Mode>
         XSIMD_INLINE void store_masked(float* mem, batch<float, A> const& src, batch_bool_constant<float, A, Values...> mask, Mode, requires_arch<avx_128>) noexcept
@@ -128,6 +144,21 @@ namespace xsimd
             return _mm_maskstore_pd(mem, mask.as_batch(), src);
         }
 
+        // Runtime-mask store for float/double on AVX-128. Same fault-suppression
+        // semantics as the masked loads above; alignment mode is irrelevant.
+        template <class A, class Mode>
+        XSIMD_INLINE void
+        store_masked(float* mem, batch<float, A> const& src, batch_bool<float, A> mask, Mode, requires_arch<avx_128>) noexcept
+        {
+            _mm_maskstore_ps(mem, _mm_castps_si128(mask), src);
+        }
+        template <class A, class Mode>
+        XSIMD_INLINE void
+        store_masked(double* mem, batch<double, A> const& src, batch_bool<double, A> mask, Mode, requires_arch<avx_128>) noexcept
+        {
+            _mm_maskstore_pd(mem, _mm_castpd_si128(mask), src);
+        }
+
         // swizzle (dynamic mask)
         template <class A, class T, class ITy, class = std::enable_if_t<std::is_floating_point<T>::value && sizeof(T) == sizeof(ITy)>>
         XSIMD_INLINE batch<T, A> swizzle(batch<T, A> const& self, batch<ITy, A> mask, requires_arch<avx_128>) noexcept