Fix avx512vl_{128,256} correctness bugs + CI default-arch typo (#1357)

* ci: fix $CXX_FLAGS typo dropping CXXFLAGS in Linux arch matrix

The avx_128, avx2_128 and avx512vl_256 matrix branches set
CXXFLAGS="$CXX_FLAGS -DXSIMD_DEFAULT_ARCH=..." but $CXX_FLAGS is
undefined at that point, so any inherited CXXFLAGS is wiped and the
intended append never happens. Use $CXXFLAGS, matching the avx512vl_128
branch. This also means the avx512vl_256 job now actually compiles with
its intended default arch (previously it silently did not).

* fix(avx512vl): correct swizzle recursion, neq NaN, decr_if/incr_if

Three correctness bugs on the avx512vl_128 / avx512vl_256 arches, which
use k-mask batch_bool registers rather than vector masks:

- 16-bit dynamic swizzle recursed infinitely. The sized-2 bridge
  bitwise_cast<uint16_t>(self) is a no-op for uint16_t, so it re-selected
  itself (gcc: 'always_inline ... inline-unit-growth limit reached',
  breaking the full avx512vl_256 test build). Add a uint16_t base that
  forwards to avx2, mirroring the existing uint8_t base.

- neq(NaN, x) returned false: float/double neq used _CMP_NEQ_OQ (ordered,
  false on NaN). IEEE != needs _CMP_NEQ_UQ, as avx/avx512f already use.

- decr_if/incr_if produced garbage (e.g. decr_if(1, all-true)=0x10000).
  They inherited avx's 'self +/- batch<T>(mask.data)', which assumes a
  vector batch_bool whose true lanes are all-ones; here mask.data is a
  k-mask bitfield, so the broadcast is wrong. Delegate to the
  select-based common implementation.

Covered by existing tests (test_decr_if/test_incr_if/test_neq/
test_neq_nan in test_xsimd_api.cpp, and the uint16 swizzle in
test_shuffle/test_batch_manip), which now pass on both VL arches under
SDE; previously they could not even build (swizzle) or were never
exercised because the VL_256 CI job lacked its default arch (see prior
commit).

Author: DiamonDinoia

.github/workflows/linux.yml

@@ -83,14 +83,14 @@ jobs:
         fi
         if [[ '${{ matrix.sys.flags }}' == 'avx_128' ]]; then
           CMAKE_EXTRA_ARGS="$CMAKE_EXTRA_ARGS -DTARGET_ARCH=sandybridge"
-          CXXFLAGS="$CXX_FLAGS -DXSIMD_DEFAULT_ARCH=avx_128"
+          CXXFLAGS="$CXXFLAGS -DXSIMD_DEFAULT_ARCH=avx_128"
         fi
         if [[ '${{ matrix.sys.flags }}' == 'avx2' ]]; then
           CMAKE_EXTRA_ARGS="$CMAKE_EXTRA_ARGS -DTARGET_ARCH=haswell"
         fi
         if [[ '${{ matrix.sys.flags }}' == 'avx2_128' ]]; then
           CMAKE_EXTRA_ARGS="$CMAKE_EXTRA_ARGS -DTARGET_ARCH=haswell"
-          CXXFLAGS="$CXX_FLAGS -DXSIMD_DEFAULT_ARCH=avx2_128"
+          CXXFLAGS="$CXXFLAGS -DXSIMD_DEFAULT_ARCH=avx2_128"
         fi
         if [[ '${{ matrix.sys.flags }}' == 'sse3' ]]; then
           CMAKE_EXTRA_ARGS="$CMAKE_EXTRA_ARGS -DTARGET_ARCH=nocona"
@@ -104,7 +104,7 @@ jobs:
         fi
         if [[ '${{ matrix.sys.flags }}' == 'avx512vl_256' ]]; then
           CMAKE_EXTRA_ARGS="$CMAKE_EXTRA_ARGS -DTARGET_ARCH=skylake-avx512"
-          CXXFLAGS="$CXX_FLAGS -DXSIMD_DEFAULT_ARCH=avx512vl_256"
+          CXXFLAGS="$CXXFLAGS -DXSIMD_DEFAULT_ARCH=avx512vl_256"
         fi
         if [[ '${{ matrix.sys.flags }}' == 'avx512pf' ]]; then
           CMAKE_EXTRA_ARGS="$CMAKE_EXTRA_ARGS -DTARGET_ARCH=knl"

include/xsimd/arch/xsimd_avx512vl_128.hpp

@@ -507,12 +507,12 @@ namespace xsimd
         template <class A>
         XSIMD_INLINE batch_bool<float, A> neq(batch<float, A> const& self, batch<float, A> const& other, requires_arch<avx512vl_128>) noexcept
         {
-            return (typename batch_bool<float, A>::register_type)_mm_cmp_ps_mask(self, other, _CMP_NEQ_OQ);
+            return (typename batch_bool<float, A>::register_type)_mm_cmp_ps_mask(self, other, _CMP_NEQ_UQ);
         }
         template <class A>
         XSIMD_INLINE batch_bool<double, A> neq(batch<double, A> const& self, batch<double, A> const& other, requires_arch<avx512vl_128>) noexcept
         {
-            return (typename batch_bool<double, A>::register_type)_mm_cmp_pd_mask(self, other, _CMP_NEQ_OQ);
+            return (typename batch_bool<double, A>::register_type)_mm_cmp_pd_mask(self, other, _CMP_NEQ_UQ);
         }
 
         template <class A, class T, class = std::enable_if_t<std::is_integral<T>::value>>
@@ -637,6 +637,22 @@ namespace xsimd
             return select(batch_bool<T, A> { Values... }, true_br, false_br, avx512vl_128 {});
         }
 
+        // decr_if / incr_if — the inherited avx kernels compute
+        // `self ± batch<T>(mask.data)`, which assumes a vector batch_bool whose
+        // true lanes are all-ones. Here batch_bool::data is a k-mask bitfield,
+        // so that broadcast yields garbage. Delegate to the select-based common
+        // implementation instead.
+        template <class A, class T, class = std::enable_if_t<std::is_integral<T>::value>>
+        XSIMD_INLINE batch<T, A> decr_if(batch<T, A> const& self, batch_bool<T, A> const& mask, requires_arch<avx512vl_128>) noexcept
+        {
+            return decr_if(self, mask, common {});
+        }
+        template <class A, class T, class = std::enable_if_t<std::is_integral<T>::value>>
+        XSIMD_INLINE batch<T, A> incr_if(batch<T, A> const& self, batch_bool<T, A> const& mask, requires_arch<avx512vl_128>) noexcept
+        {
+            return incr_if(self, mask, common {});
+        }
+
         // reciprocal
         template <class A>
         XSIMD_INLINE batch<float, A>

include/xsimd/arch/xsimd_avx512vl_256.hpp

@@ -374,6 +374,15 @@ namespace xsimd
         {
             return swizzle(batch<uint8_t, avx2> { self.data }, batch<uint8_t, avx2> { mask.data }, avx2 {}).data;
         }
+        // No EVEX byte/word permute without AVX512_VBMI, so 16-bit dynamic
+        // swizzle forwards to avx2 — mirrors the uint8_t base above. Without
+        // this base the sized-2 bridge below re-selects itself for uint16_t
+        // and recurses forever (always_inline build failure).
+        template <class A>
+        XSIMD_INLINE batch<uint16_t, A> swizzle(batch<uint16_t, A> const& self, batch<uint16_t, A> mask, requires_arch<avx512vl_256>) noexcept
+        {
+            return swizzle(batch<uint16_t, avx2> { self.data }, batch<uint16_t, avx2> { mask.data }, avx2 {}).data;
+        }
         template <class A, typename T, detail::enable_sized_t<T, 1> = 0>
         XSIMD_INLINE batch<T, A> swizzle(batch<T, A> const& self, batch<uint8_t, A> const& mask, requires_arch<avx512vl_256> req) noexcept
         {
@@ -589,12 +598,12 @@ namespace xsimd
         template <class A>
         XSIMD_INLINE batch_bool<float, A> neq(batch<float, A> const& self, batch<float, A> const& other, requires_arch<avx512vl_256>) noexcept
         {
-            return (typename batch_bool<float, A>::register_type)_mm256_cmp_ps_mask(self, other, _CMP_NEQ_OQ);
+            return (typename batch_bool<float, A>::register_type)_mm256_cmp_ps_mask(self, other, _CMP_NEQ_UQ);
         }
         template <class A>
         XSIMD_INLINE batch_bool<double, A> neq(batch<double, A> const& self, batch<double, A> const& other, requires_arch<avx512vl_256>) noexcept
         {
-            return (typename batch_bool<double, A>::register_type)_mm256_cmp_pd_mask(self, other, _CMP_NEQ_OQ);
+            return (typename batch_bool<double, A>::register_type)_mm256_cmp_pd_mask(self, other, _CMP_NEQ_UQ);
         }
 
         template <class A, class T, class = std::enable_if_t<std::is_integral<T>::value>>
@@ -719,6 +728,22 @@ namespace xsimd
             return select(batch_bool<T, A> { Values... }, true_br, false_br, avx512vl_256 {});
         }
 
+        // decr_if / incr_if — the inherited avx kernels compute
+        // `self ± batch<T>(mask.data)`, which assumes a vector batch_bool whose
+        // true lanes are all-ones. Here batch_bool::data is a k-mask bitfield,
+        // so that broadcast yields garbage. Delegate to the select-based common
+        // implementation instead.
+        template <class A, class T, class = std::enable_if_t<std::is_integral<T>::value>>
+        XSIMD_INLINE batch<T, A> decr_if(batch<T, A> const& self, batch_bool<T, A> const& mask, requires_arch<avx512vl_256>) noexcept
+        {
+            return decr_if(self, mask, common {});
+        }
+        template <class A, class T, class = std::enable_if_t<std::is_integral<T>::value>>
+        XSIMD_INLINE batch<T, A> incr_if(batch<T, A> const& self, batch_bool<T, A> const& mask, requires_arch<avx512vl_256>) noexcept
+        {
+            return incr_if(self, mask, common {});
+        }
+
         // reciprocal
         template <class A>
         XSIMD_INLINE batch<float, A>