Add MEMW_R register fast-path table (#477)

* save work

* Fix MEMW_R routing predicate to allow timestamp delta = 2^16

* promote old_timestamp assert, add IS_HALF vs LT doc, and expand test coverage

* fix comment

* Add underflow guard and change assert to debug_assert

---------

Co-authored-by: Nicole <nicole.graus@lambdaclass.com>

Author: 2 people

prover/src/lib.rs

@@ -41,8 +41,8 @@ use crate::tables::types::BusId;
 use crate::test_utils::{
     E, F, VmAir, create_bitwise_air, create_branch_air, create_commit_air, create_cpu_air,
     create_decode_air, create_dvrm_air, create_halt_air, create_load_air, create_lt_air,
-    create_memw_air, create_memw_aligned_air, create_mul_air, create_page_air, create_register_air,
-    create_shift_air,
+    create_memw_air, create_memw_aligned_air, create_memw_register_air, create_mul_air,
+    create_page_air, create_register_air, create_shift_air,
 };
 
 use stark::proof::options::{GoldilocksCubicProofOptions, ProofOptions};
@@ -73,6 +73,7 @@ pub struct TableCounts {
     pub dvrm: usize,
     pub shift: usize,
     pub branch: usize,
+    pub memw_register: usize,
 }
 
 impl TableCounts {
@@ -91,6 +92,7 @@ impl TableCounts {
             + self.dvrm
             + self.shift
             + self.branch
+            + self.memw_register
     }
 
     /// Validate that all required tables have at least one chunk.
@@ -108,6 +110,7 @@ impl TableCounts {
             ("dvrm", self.dvrm),
             ("shift", self.shift),
             ("branch", self.branch),
+            ("memw_register", self.memw_register),
         ];
         for (name, count) in checks {
             if count == 0 {
@@ -195,6 +198,7 @@ pub(crate) struct VmAirs {
     pub commit: VmAir,
     pub register: VmAir,
     pub pages: Vec<VmAir>,
+    pub memw_registers: Vec<VmAir>,
 }
 
 impl VmAirs {
@@ -242,6 +246,13 @@ impl VmAirs {
         for (air, trace) in self.pages.iter().zip(traces.pages.iter_mut()) {
             pairs.push((air, trace, &()));
         }
+        for (air, trace) in self
+            .memw_registers
+            .iter()
+            .zip(traces.memw_registers.iter_mut())
+        {
+            pairs.push((air, trace, &()));
+        }
 
         pairs
     }
@@ -286,6 +297,9 @@ impl VmAirs {
         for air in &self.pages {
             refs.push(air);
         }
+        for air in &self.memw_registers {
+            refs.push(air);
+        }
 
         refs
     }
@@ -358,6 +372,9 @@ impl VmAirs {
                 )
             })
             .collect();
+        let memw_registers: Vec<_> = (0..table_counts.memw_register)
+            .map(|i| create_memw_register_air(proof_options).with_name(&format!("MEMW_R[{}]", i)))
+            .collect();
 
         #[cfg(feature = "debug-checks")]
         debug_report::print_bus_legend();
@@ -378,6 +395,7 @@ impl VmAirs {
             commit,
             register,
             pages,
+            memw_registers,
         }
     }
 }